Methods for fabricating flat panel display systems and components

• US 5,652,083 A
• Filed: 06/07/1995
• Issued: 07/29/1997
• Est. Priority Date: 11/04/1993
• Status: Expired due to Fees

• Current Assignee: SI Diamond Technology, Inc. (Nano Magic, Inc.)
• Original Assignee: Microelectronics and Computer Technology Corporation
• Inventors: Xie, Chenggang, Kumar, Nalin
• Primary Examiner(s): Duda, Kathleen
• Application Number:
  US08/473,911
• Time in Patent Office: 783 Days
• Field of Search: 430/311, 430/313, 430/315, 430/318, 430/320, 430/323, 156/643.1, 204/192.5, 204/192.1, 427/77
• US Class Current: 430/315
• CPC Class Codes: H01J 2201/30457 Diamond
• CPC Class Codes: H01J 31/127 using large area or array sources, i.e. essentially a source for each pixel group
• CPC Class Codes: H01J 9/025 of field emission cathodes

Abstract

A method is provided for fabricating a display cathode which includes forming a conductive line adjacent a face of a substrate. A region of amorphic diamond is formed adjacent a selected portion of the conductive line.

Claims

1. A method of fabricating a cathode plate comprising the steps of:

forming a layer of conductive material on a face of a substrate;

patterning and etching the layer of conductive material to define a plurality of cathode stripes spaced between exposed regions of the substrate;

forming a plurality of spacers disposed on said exposed regions of the substrate; and

selectively forming a plurality of diamond emitter regions on selected areas of the cathode stripes.

2. The method of claim 1 wherein said step of forming a plurality of spacers comprises the step of forming a plurality of glass beads.

3. The method of claim 1 wherein said step of forming a plurality of spacers comprises the step of forming a plurality of fibers.

4. The method of claim 1 wherein said step of forming a plurality of spacers comprises the steps of:

forming a second layer of conductive material over the substrate and the plurality of cathode stripes;

forming a layer of photoresist over the second layer of conductive material;

exposing and developing the layer of photoresist to form a mask defining boundaries and locations of the plurality of spacers;

forming a spacer material at the locations defined by the mask; and

removing the layer of photoresist.

5. The method of claim 1 wherein said step of selectively forming a plurality of diamond emitter regions further comprises the steps of:

positioning a mask over the cathode plate; and

using laser ablation to form the plurality of diamond emitter regions through the mask.

6. The method of claim 1 wherein the plurality of diamond emitter regions are each substantially flat.

7. The method of claim 1 wherein said diamond emitter regions are amorphic diamond emitter regions.

8. A method of fabricating a cathode plate comprising the steps of:

forming a layer of conductive material on a face of a substrate;

patterning and etching the layer of conductive material to define a plurality of cathode stripes spaced by exposed regions of the substrate;

selectively forming regions of high resistivity material on portions of the cathode stripes; and

selectively forming a plurality of diamond emitter regions on selected areas of the regions of high resistivity material.

9. The method of claim 8 wherein said step of forming regions of high resistivity material comprises the step of forming regions of amorphous silicon.

10. The method of claim 8 wherein said step of forming a plurality of diamond regions comprises the step of forming a plurality of amorphic diamond regions using random morphology.

11. The method of claim 8, wherein after said patterning and etching step further comprising the steps of:

forming an insulator layer over the plurality of cathode stripes spaced by the exposed regions of the substrate;

forming a metal layer over the insulator layer; and

patterning and etching the insulator layer and the metal layer to form a plurality of spacers and an extraction grid over each of the plurality of cathode stripes.

12. The method of claim 8 wherein the plurality of diamond emitter regions are each substantially flat.

13. The method of claim 8 wherein said diamond emitter regions are amorphic diamond emitter regions.

14. A method of fabricating a cathode plate comprising the steps of:

forming a layer of conductive material on a face of a substrate;

patterning and etching the layer of conductive material to define a plurality of cathode stripes spaced by exposed regions of the substrate, the plurality of cathode stripes including a plurality of apertures therethrough exposing underlying regions of the substrate;

selectively forming regions of high resistivity material within the apertures through the cathode stripes; and

selectively forming a plurality of diamond emitter regions on selected areas of the regions of high resistivity material.

15. The method of claim 14 wherein said step of forming regions of high resistivity material comprises the step of forming regions of amorphous silicon.

16. The method of claim 14 wherein said step of forming a plurality of diamond emitter regions in selected areas of the regions of high resistivity material comprises the step of forming amorphic diamond regions using random morphology.

17. The method of claim 14 wherein the plurality of diamond emitter regions are each substantially flat.

18. The method of claim 14, wherein the regions of high resistivity material within the apertures through the cathode stripes physically contact the underlying regions of the substrate.