×

Built-in load board design for performing high resolution quiescent current measurements of a device under test

  • US 5,652,524 A
  • Filed: 10/24/1995
  • Issued: 07/29/1997
  • Est. Priority Date: 10/24/1995
  • Status: Expired due to Fees
First Claim
Patent Images

1. A load board having multi-level signal and power planes, for coupling pins of an integrated circuit device under test (DUT) to a conventional integrated circuit tester, comprising:

  • said load board having at least two separated portions each having a plurality of signal and power planes,a quiescent test circuit mounted on and integrated with a first portion of said multi-level load board such that said quiescent test circuit is contained on and electrically connected to its multilevel signal and power planes,said load board having means for mounting the device under test (DUT) on a second portion of multi-level load board and for connecting said DUT to its multi-level signal and plural power planes,said quiescent test circuit having means for coupling the integrated circuit tester to the integrated circuit device under test (DUT), andsaid quiescent test circuit having means for switching a low power level to one of said plural power planes of said second portion of said multi-lever load board to allow the integrated circuit test to selectably measure quiescent current consumption of the integrated circuit device under test.

View all claims
  • 1 Assignment
Timeline View
Assignment View
    ×
    ×