Devices and systems with conditional instructions
First Claim
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1. A data processing device or system, comprising:
- an analog-to-digital converter;
an electronic processor with an instruction pipeline connected to said analog-to-digital processor;
means for decoding a conditional execution instruction within said instruction pipeline;
means for conditioning the execution of a predetermined set of conditioned instructions following said conditional execution instruction within said instruction pipeline in response to a status condition specified in said conditional execution instruction;
means for executing said set of conditioned instructions without flushing said instruction pipeline; and
wherein means for conditioning further comprise;
means for determining which status conditions of a set of predetermined status conditions have been selected by said conditional execution instruction with mask bits representative of said predetermined status conditions;
means for determining which values are required by said conditional execution instruction for said selected set of predetermined status conditions with status bits representative of said predetermined values; and
means for allowing normal execution of said conditioned instructions based on a logical combination of said mask bits and said status bits.
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Abstract
A data processing device includes a circuit having status conditions wherein a particular set of the status conditions can occur in operation of the circuit. An instruction register operates to hold a branch instruction conditional on a particular set of the status conditions. A decoder is connected to the instruction register and the circuit. A program counter is coupled to the decoder wherein the decoder is operable to enter a branch address into the program counter in response to the branch instruction when the particular set of the status conditions of the circuit are present. Other data processing devices, systems and methods are also disclosed.
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Citations
6 Claims
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1. A data processing device or system, comprising:
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an analog-to-digital converter; an electronic processor with an instruction pipeline connected to said analog-to-digital processor; means for decoding a conditional execution instruction within said instruction pipeline; means for conditioning the execution of a predetermined set of conditioned instructions following said conditional execution instruction within said instruction pipeline in response to a status condition specified in said conditional execution instruction; means for executing said set of conditioned instructions without flushing said instruction pipeline; and wherein means for conditioning further comprise; means for determining which status conditions of a set of predetermined status conditions have been selected by said conditional execution instruction with mask bits representative of said predetermined status conditions; means for determining which values are required by said conditional execution instruction for said selected set of predetermined status conditions with status bits representative of said predetermined values; and means for allowing normal execution of said conditioned instructions based on a logical combination of said mask bits and said status bits. - View Dependent Claims (2, 3, 4)
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5. A data processing device or system, comprising:
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an analog-to-digital converter; an electronic processor with an instruction pipeline connected to said analog-to-digital processor; means for decoding a conditional execution instruction within said instruction pipeline; means for conditioning the execution of a predetermined set of conditioned instructions following said conditional execution instruction within said instruction pipeline in response to a status condition specified in said conditional execution instruction; means for executing said set of conditioned instructions without flushing said instruction pipeline; and wherein means for conditioning further comprise; means for determining which status conditions of a set of predetermined status conditions have been selected by said conditional execution instruction with mask bits representative of said predetermined status conditions; means for determining which values are required by said conditional execution instruction for said selected set of predetermined status conditions with status bits representative of said predetermined values; means for making a multiple status test in a single cycle by enabling testing of selected status conditions selected by said mask bits and ignoring status conditions not selected by said mask bits; and means for comparing an actual value each of said selected status conditions to a predetermined value contained in corresponding said status bit of the conditional execution instruction.
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6. A data processing device or system, comprising:
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an analog-to-digital converter; an electronic processor with an instruction pipeline connected to said analog-to-digital processor; means for decoding a conditional execution instruction within said instruction pipeline; means for conditioning the execution of a predetermined set of conditioned instructions following said conditional execution instruction within said instruction pipeline in response to a status condition specified in said conditional execution instruction; means for executing said set of conditioned instructions without flushing said instruction pipeline; wherein said conditional execution instruction includes a pair of bits corresponding to each of said status conditions of said set of predetermined status conditions; wherein means for conditioning further comprise; means for determining which status conditions of a set of predetermined status conditions have been selected by said conditional execution instruction with mask bits representative of said predetermined status conditions; and wherein said means for determining which status conditions further comprises, means for using a first of said pair of bits as said mask bit for determining whether to consider a status condition; and means for using a second of said pair of bits as a level to test said actual value of said status condition against.
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Specification