Performance prediction method for semiconductor power modules and ICS
First Claim
1. A method of predicting the future performance of a semiconductor integrated circuit device comprising the steps of:
- (a) providing a semiconductor device, said semiconductor device being mounted by an interface material on an island;
(b) providing power to said semiconductor device, said power causing thermal expansion of said die island, said interface material, and said semiconductor device;
(c) initializing a system data base by providing a plurality of starting values from said semiconductor device into a system database, said starting values representing a plurality of device parameters;
(d) measuring a plurality of snap-shot values for each of said device parameters while said device is in said powered state;
(e) calculating a plurality of operating limits for each of said device parameters, said operating limits based upon said starting values and snap-shot values;
(f) testing said snap-shot values against said operating limits to produce a plurality of results;
(g) selecting an output dependent upon said results;
(h) if said output is not an alarm state, repeating steps (d) to (g) until said output is said alarm state; and
(i) predicting a performance based on said results.
1 Assignment
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Accused Products
Abstract
Apparatus (30) and method (70) for predicting the future performance of a semiconductor power module, power device, or high power integrated circuit for the purpose of planning its repair or replacement before it actually fails. The apparatus provides a central processor (33), output device (37), user interface (39), system memory (35), and data base (41). The method is provided by an application specific integrated circuit (45) or custom software program (45). The method provides a measurement and testing procedure for device parameters such as thermal resistance RthJC, power supply voltage VDD, and power supply current IDD. These device parameters typically characterize various chip components including the die attached interface, chip structure, and bonding wires. As these components degrade, the method via monitoring device parameters turns-off the device and its peripheral circuits and apparatus in an orderly manner.
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Citations
20 Claims
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1. A method of predicting the future performance of a semiconductor integrated circuit device comprising the steps of:
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(a) providing a semiconductor device, said semiconductor device being mounted by an interface material on an island; (b) providing power to said semiconductor device, said power causing thermal expansion of said die island, said interface material, and said semiconductor device; (c) initializing a system data base by providing a plurality of starting values from said semiconductor device into a system database, said starting values representing a plurality of device parameters; (d) measuring a plurality of snap-shot values for each of said device parameters while said device is in said powered state; (e) calculating a plurality of operating limits for each of said device parameters, said operating limits based upon said starting values and snap-shot values; (f) testing said snap-shot values against said operating limits to produce a plurality of results; (g) selecting an output dependent upon said results; (h) if said output is not an alarm state, repeating steps (d) to (g) until said output is said alarm state; and (i) predicting a performance based on said results. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 18, 19, 20)
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9. The method of predicting the future performance of a plurality of semiconductor integrated circuit devices integral within a system comprising the steps of:
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(a) providing a plurality of semiconductor device, each of said semiconductor devices being attached to an island by an interface material; (b) providing power to each of said semiconductor devices, said power expanding causing thermal expansion of said island, said interface material, and each of said semiconductor devices; (c) initializing a system data base by providing a plurality of starting values from each of said semiconductor devices into a system database, said starting values representing a plurality of device parameters; (d) measuring a plurality of snap-shot values for each of said device parameters while said device is in said powered state; (e) calculating a plurality of average values, ranges and operating limits for each of said device parameters; (f) storing said snap-shot values, average values, ranges, and operating limits into a system data base; (g) testing said average values and said ranges against said operating limits to produce a plurality of results; (h) selecting an output dependent upon said results; (i) if said output is not an alarm state, repeating steps (d) to (h) until said output is said alarm state. - View Dependent Claims (10, 11, 12, 13, 14, 15, 16)
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17. A method of identifying a reject semiconductor integrated circuit device comprising the steps of:
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providing a semiconductor device, said semiconductor device being attached to an island by an interface material; providing power to said semiconductor device, said power expanding causing thermal expansion of said island, said interface material, and said semiconductor device; initializing a system data base by providing an initial value for a device parameter for said semiconductor device; exercising said semiconductor device; successively measuring a snap-shot value of said device parameter during said exercising step; calculating a plurality of average values from said initial device parameter and said snap-shot value; identifying differences between each of said average values; and rejecting said semiconductor device based upon said differences.
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Specification