Performance prediction method for semiconductor power modules and ICS

• US 5,654,896 A
• Filed: 10/31/1994
• Issued: 08/05/1997
• Est. Priority Date: 10/31/1994
• Status: Expired due to Term

• Current Assignee: IXYS Corporation (Littelfuse Incorporated)
• Original Assignee: IXYS Corporation (Littelfuse Incorporated)
• Inventors: Ochi, Sam Seiichiro
• Primary Examiner(s): Teska, Kevin J.
• Assistant Examiner(s): Walker, Tyrone V.
• Application Number:
  US08/332,482
• Time in Patent Office: 1,009 Days
• Field of Search: 364/550, 364/551.01, 364/551.02, 364/554, 364/488, 364/578, 324/158.1, 324/765, 324/500, 340/505, 340/507, 340/511, 340/635, 340/653, 371/25.1, 371/26, 395/575
• US Class Current: 324/764.01
• CPC Class Codes: G01R 31/30 Marginal testing, e.g. by varying supply voltage testing computers during standby operation or idle time G06F11/22
• CPC Class Codes: H01L 2224/32245 the item being metallic
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48247 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/48465 the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/1301 Thyristor
• CPC Class Codes: H01L 2924/1305 Bipolar Junction Transistor [BJT]
• CPC Class Codes: H01L 2924/13055 Insulated gate bipolar transistor [IGBT]
• CPC Class Codes: H01L 2924/13091 Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]

Abstract

Apparatus (30) and method (70) for predicting the future performance of a semiconductor power module, power device, or high power integrated circuit for the purpose of planning its repair or replacement before it actually fails. The apparatus provides a central processor (33), output device (37), user interface (39), system memory (35), and data base (41). The method is provided by an application specific integrated circuit (45) or custom software program (45). The method provides a measurement and testing procedure for device parameters such as thermal resistance R_thJC, power supply voltage V_DD, and power supply current I_DD. These device parameters typically characterize various chip components including the die attached interface, chip structure, and bonding wires. As these components degrade, the method via monitoring device parameters turns-off the device and its peripheral circuits and apparatus in an orderly manner.

Claims

1. A method of predicting the future performance of a semiconductor integrated circuit device comprising the steps of:

(a) providing a semiconductor device, said semiconductor device being mounted by an interface material on an island;

(b) providing power to said semiconductor device, said power causing thermal expansion of said die island, said interface material, and said semiconductor device;

(c) initializing a system data base by providing a plurality of starting values from said semiconductor device into a system database, said starting values representing a plurality of device parameters;

(d) measuring a plurality of snap-shot values for each of said device parameters while said device is in said powered state;

(e) calculating a plurality of operating limits for each of said device parameters, said operating limits based upon said starting values and snap-shot values;

(f) testing said snap-shot values against said operating limits to produce a plurality of results;

(g) selecting an output dependent upon said results;

(h) if said output is not an alarm state, repeating steps (d) to (g) until said output is said alarm state; and

(i) predicting a performance based on said results.

2. The method of claim 1 wherein said device parameters includes a thermal resistance R_thJC.

3. The method of claim 2 wherein said device parameters further includes an on-resistance of a MOSFET R_DSON, power supply voltage V_DD, and a power supply current I_DD.

4. The method of claim 2 wherein said device parameters further includes a collector to emitter saturation voltage for an IGBT V_CESAT, power supply voltage V_DD, and a power supply current I_DD.

5. The method of claim 1 wherein said measuring step occurs at a turn-on, at just before a turn-off, and at periodic time frequency between said turn-on and said turn-off.

6. The method of claim 5 wherein said periodic time frequency is about one hour and greater.

7. The method of claim 1 further comprising the step of turning said device off, turning a system off, and repairing or replacing said device if said output is in an alarm state.

8. The method of claim 1 wherein each of said starting values are calculated from an initial snap-shot value and a manufacturer'"'"'s specified value.

18. The method of claim 1 wherein said thermal expansion provides an increased resistance between said die island and said semiconductor device to increase.

19. The method of claim 1 wherein said thermal expansion provides a power supply current to increase.

20. The method of claim 1 wherein said performance is selected from a group consisting of an interface failure, a wire failure, and a semiconductor device failure.

9. The method of predicting the future performance of a plurality of semiconductor integrated circuit devices integral within a system comprising the steps of:

(a) providing a plurality of semiconductor device, each of said semiconductor devices being attached to an island by an interface material;

(b) providing power to each of said semiconductor devices, said power expanding causing thermal expansion of said island, said interface material, and each of said semiconductor devices;

(c) initializing a system data base by providing a plurality of starting values from each of said semiconductor devices into a system database, said starting values representing a plurality of device parameters;

(d) measuring a plurality of snap-shot values for each of said device parameters while said device is in said powered state;

(e) calculating a plurality of average values, ranges and operating limits for each of said device parameters;

(f) storing said snap-shot values, average values, ranges, and operating limits into a system data base;

(g) testing said average values and said ranges against said operating limits to produce a plurality of results;

(h) selecting an output dependent upon said results;

(i) if said output is not an alarm state, repeating steps (d) to (h) until said output is said alarm state.

10. The method of claim 9 wherein said device parameters includes a thermal resistance R_thJC.

11. The method of claim 10 wherein said device parameters further includes an on-resistance of a MOSFET R_DSON, power supply voltage V_DD, and a power supply current I_DD.

12. The method of claim 9 wherein said device parameters further includes a collector to emitter saturation voltage for an IGBT V_CESAT, power supply voltage V_DD, and a power supply current I_DD.

13. The method of claim 9 wherein said measuring step occurs at a turn-on, at just before a turn-off, and at a periodic time frequency between said turn-on and said turn-off.

14. The method of claim 9 wherein said periodic time frequency is about one hour and greater.

15. The method of claim 9 further comprising the step of turning said device off, turning said system off, and repairing or replacing said semiconductor device after said alarm state.

16. The method of claim 9 wherein each of said starting values are calculated from an initial snap-shot value and a manufacturer'"'"'s specified value.

17. A method of identifying a reject semiconductor integrated circuit device comprising the steps of:

providing a semiconductor device, said semiconductor device being attached to an island by an interface material;

providing power to said semiconductor device, said power expanding causing thermal expansion of said island, said interface material, and said semiconductor device;

initializing a system data base by providing an initial value for a device parameter for said semiconductor device;

exercising said semiconductor device;

successively measuring a snap-shot value of said device parameter during said exercising step;

calculating a plurality of average values from said initial device parameter and said snap-shot value;

identifying differences between each of said average values; and

rejecting said semiconductor device based upon said differences.