Control and 3-dimensional simulation model of temperature variations in a rapid thermal processing machine

• US 5,654,904 A
• Filed: 09/30/1996
• Issued: 08/05/1997
• Est. Priority Date: 05/18/1994
• Status: Expired due to Term

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Thakur, Randhir P. S.
• Primary Examiner(s): Ramirez, Ellis B.
• Assistant Examiner(s): PEESO, THOMAS R
• Application Number:
  US08/723,106
• Time in Patent Office: 309 Days
• Field of Search: 364/557, 364/489, 364/490, 437/138, 437/247, 437/248, 204/298.09, 204/298.03
• US Class Current: 702/137
• CPC Class Codes: C23C 16/46 characterised by the method used for heating the substrate C23C16/48, C23C16/50 take precedence
• CPC Class Codes: G05B 17/02 electric
• CPC Class Codes: G05D 23/1917 using digital means

Abstract

Temperature nonuniformity across a semiconductor wafer during both the transient and steady state of a typical rapid thermal processing (RTP) cycle has been a deterrent in using RTP in many ULSI unit processes. The present invention consists of a three-dimensional mathematical model to study the temperature variation across a wafer in an RTP oven for given heating element power settings, during both the transient and steady state of a typical thermal cycle and control a heating element by a computer program. The validity of various models have been checked by performing a series of oxidation experiments.

Claims

1. A rapid thermal process for presetting and controlling a heating system used to heat a semiconductor wafer, the process comprising:

a) initializing input data to a computer main program, the input data including indicia relating to the heating system and properties of the semiconductor wafer;

b) calculating an expected temperature for a plurality of three-dimensional wafer volume elements versus time, responsive to the input data indicia;

c) individually controlling a power level to multiple heating elements within the heating system, the power level being controlled, directly or indirectly, by the computer main program responsive to the expected temperature calculated for the volume elements to provide a predetermined temperature ramp rate and steady state level for minimal wafer temperature nonuniformity;

d) monitoring the wafer temperature with at least one temperature sensor; and

,

e) providing a temperature feedback from the temperature sensor to, selectively, a heat controller or the computer main program, thereby providing for quick and accurate controlling of the wafer temperature.

2. The process as recited in claim 1 wherein the semiconductor wafer has a diameter of between about 6 inches to about 12 inches.

3. The process as recited in claim 1 wherein the semiconductor wafer has a pattern which is irregular.

4. The process as recited in claim 1 further including:

a) initializing secondary input data to the computer main program, the secondary input data including indicia relating to the heating system and properties of at least a second semiconductor wafer;

b) monitoring the at least second wafer temperature of the at least second wafer with at least one temperature sensor; and

,

c) providing a temperature feedback from the temperature sensor to, selectively, the heat controller or the computer main program, thereby providing for quick and accurate controlling of the at least second wafer temperature.

5. The process as recited in claim 1 wherein the heating system is selected from the group consisting of a resistive heating system, a plasma heating system, a lamp assisted resistive heating system, a lamp assisted plasma heating system, and a combination of resistive, plasma, and lamp assisted heating systems.

6. The process as recited in claim 1 wherein the computer main program includes, selectively, fuzzy logic, a neural network, or a combination of fuzzy logic and a neural network.

7. The process as recited in claim 1 further including providing a gas around the semiconductor wafer while heating the semiconductor wafer.

8. The process as recited in claim 7 further including controlling a gas pressure while heating the semiconductor wafer.

9. A computer control system for presetting and controlling a heating system to heat a semiconductor wafer, the system comprising:

a) a main computer and computer program having input data, the input data including indicia relating to the heating system and properties of the semiconductor wafer;

b) means for calculating an expected temperature for a plurality of three-dimensional wafer volume elements versus time, responsive to the input data indicia;

c) a heat controller having an input signal from, selectively, a temperature indicator or the main computer;

d) the heating system having a power input from the heat controller;

e) at least one temperature sensor; and

,

f) a temperature feedback means for feeding back temperature data from the at least one temperature sensor to, selectively, the heat controller or main computer, wherein the main computer outputs time, temperature, wafer X and Y coordinates for the volume elements, and heat intensity to preset and control the heating system power input.

10. The system as recited in claim 9 wherein the semiconductor wafer has a diameter of between about 6 inches to about 12 inches.

11. The system as recited in claim 9 wherein the semiconductor wafer has a pattern which is irregular.

12. The system as recited in claim 9 further including the main computer and computer program having secondary input data, the secondary input data including indicia relating to the heating system and properties of at least a second semiconductor wafer.

13. The system as recited in claim 9 wherein the heating system is selected from the group consisting of a resistive heating system, a plasma heating system, a lamp assisted resistive heating system, a lamp assisted plasma heating system, and a combination of resistive, plasma, and lamp assisted heating systems.

14. The system as recited in claim 9 wherein the computer main program comprises, selectively, fuzzy logic, a neural network, or a combination of fuzzy logic and a neural network.

15. The system as recited in claim 9 further including means for providing a gas around the semiconductor wafer while heating the semiconductor wafer.

16. The system as recited in claim 15 further including means for controlling a gas pressure while heating the semiconductor wafer.