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Method and apparatus for dynamic scheduling of instructions to ensure sequentially coherent data in a processor employing out-of-order execution

  • US 5,655,096 A
  • Filed: 08/25/1993
  • Issued: 08/05/1997
  • Est. Priority Date: 10/12/1990
  • Status: Expired due to Term
First Claim
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1. A method of executing a program in a processor;

  • said program comprising instructions in sequential program order with each of said instructions logically previous to all subsequent instructions;

    the instructions comprising source operand specifiers and destination operand specifiers;

    said source operand specifiers specifying source locations for reading source operands; and

    said destination operand specifiers specifying destination locations for writing results of the instruction;

    said processor including at least one execution unit for instruction execution;

    said method comprising the steps of;

    obtaining the instructions in said sequential program order;

    for each of the instructions dynamically, at run-time, determining an execution-point defining when said instruction execution is to begin, such that;

    all logically previous writes to said source locations will be accomplished before the instruction execution reads said source locations;

    all logically previous reads of said destination locations will be accomplished before the instruction execution causes said destination locations to be overwritten; and

    all logically previous writes to the destination locations will be accomplished before the instruction execution causes the destination locations to be overwritten;

    and beginning use of said execution unit by the instruction only when said execution-point has been reached;

    wherebythe processor, when appropriate, executes the instructions in an order that differs from the sequential program order;

    program execution results are identical to said program execution results obtained by executing the instructions, one at a time, in the sequential program order;

    each of the instructions is executed as early as possible with foreknowledge of when all logically previous writes of the source locations and all logically previous reads and writes of the destination locations will be completed, instead of waiting until after said logically previous reads and writes have been completed before beginning execution; and

    the execution unit is utilized by the instruction only during the instruction'"'"'s active execution, thus maximizing the execution unit availabilty for other instructions, rather than monopolizing the execution unit while waiting for execution to begin.

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