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SCSI host adapter integrated circuit utilizing a sequencer circuit to control at least one non-data SCSI phase without use of any processor

  • US 5,655,147 A
  • Filed: 04/19/1994
  • Issued: 08/05/1997
  • Est. Priority Date: 02/28/1991
  • Status: Expired due to Term
First Claim
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1. A host adapter integrated circuit for use in a host computer system having a host computer bus, a host processor for executing user instructions, and a SCSI bus having a set of data lines and a set of control lines, and for transfer of data between a host computer data bus of said host computer bus, and said SCSI bus via a SCSI protocol that includes a sequence of SCSI phases, said host adapter integrated circuit comprising:

  • a sequencer circuit having a first plurality of control lines coupled to said host computer bus and a second plurality of control lines connected to said set of control lines of said SCSI bus;

    wherein said sequencer circuit controls at least one SCSI phase that is different from a SCSI data phase in said sequence of SCSI phases and completes said at least one SCSI phase without use of any processor; and

    a hardware interrupt circuit having an input line connected to said sequencer circuit and an interrupt output line;

    wherein upon receipt of a signal on said input line, said hardware interrupt circuit generates a hardware interrupt signal on said interrupt output line for said host processor, and further wherein upon receipt of said hardware interrupt, said host processor suspends operation of any program executing in said host computer system, and uses said host adapter integrated circuit to perform another SCSI phase of operations in said sequence of SCSI phases for transferring data between said host computer data bus and said set of data lines of said SCSI bus.

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