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Method of manufacturing a semiconductor accelerometer

  • US 5,656,512 A
  • Filed: 05/31/1995
  • Issued: 08/12/1997
  • Est. Priority Date: 06/12/1991
  • Status: Expired due to Term
First Claim
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1. A process for manufacturing a semiconductor device comprising the steps of:

  • (a) forming a buried insulator region beneath a first portion of a first surface of a semiconductor substrate;

    (b) forming a semiconductor layer on said first surface of said semiconductor substrate, so as to overlie said buried insulator region therebeneath;

    (c) attaching the structure formed in step (b) to a support substrate by way of an insulator layer such that said insulator layer lies between said semiconductor layer and said support substrate;

    (d) selectively forming an etch masking layer on said semiconductor substrate so as to define a patterned etch mask having a topology that exposes a first portion of said semiconductor substrate overlying said buried insulator region therebeneath and a second portion of said semiconductor substrate spaced-apart from said first portion thereof and overlying a portion of said substrate spaced-apart from said buried insulator region therein;

    (e) exposing the structure resulting from step (d) to a first etchant which etches the exposed first portion of said semiconductor substrate down to said buried insulator region, and etches the exposed second portion of said semiconductor substrate and said semiconductor layer therebeneath to said insulator layer; and

    (f) exposing the structure resulting from step (e) to a second etchant which etches said buried insulator region and said insulator layer, so as to leave a relatively large mass region of semiconductor material between said first and second portions of said semiconductor substrate supported by a reduced thickness portion of said semiconductor substrate and adjoining material of said semiconductor layer beneath the region of said semiconductor substrate from which said buried insulator region has been etched.

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