Method of making electric field emitter device for electrostatic discharge protection of integrated circuits

• US 5,656,530 A
• Filed: 06/26/1995
• Issued: 08/12/1997
• Est. Priority Date: 03/15/1993
• Status: Expired due to Fees

• Current Assignee: Avago Technologies General IP PTE Limited (Broadcom, Inc.)
• Original Assignee: Hewlett-Packard Company (HP Inc.)
• Inventors: Leary, David J.
• Primary Examiner(s): Wilczewski, Mary
• Assistant Examiner(s): DUTTON, BRIAN KEITH
• Application Number:
  US08/494,514
• Time in Patent Office: 778 Days
• Field of Search: 437/209, 437/922, 437/927, 437/60, 148/DIG. 55, 257/529, 257/530
• US Class Current: 438/639
• CPC Class Codes: H01L 23/60 Protection against electrostatic charges or discharges, e.g. Faraday shields
• CPC Class Codes: H01L 27/0248 for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
• CPC Class Codes: H01L 27/0251 for MOS devices
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

An electrostatic discharge device having a small separation between two traces wherein a voltage above a desired threshold will discharge across the separation through the mechanism of cold cathode electric field emission. Conditions which permit quantum mechanical tunneling of electrons across the emitting cathode/vacuum potential barrier, such as low emitter work function, electric field enhancing geometry, and cathode/anode separation size, determine the voltage necessary for discharge by this mechanism. One device has a first conductive trace formed on an insulating layer and then masked and etched to leave an undercut with a sharp point. A second conductive trace is formed in the undercut opposite the point, resulting in a three-dimensional cross section having a very small separation. A second device has the point formed by depositing a metal layer over a spacing in a dielectric layer, and then etching out the dielectric layer.

Claims

1. A method of constructing an integrated circuit device for protecting circuits from electrostatic discharge, said method comprising the steps of:

forming a first conductive trace over an insulating layer of a substrate of said integrated circuit device, said first conductive trace being connected to an input circuit path to be protected from said electrostatic discharge;

removing said insulating layer under a first end of said first conductive trace thereby leaving an undercut portion of said first conductive trace; and

forming a second conductive trace adjacent said undercut portion of said first conductive trace and said substrate wherein said second conductive trace is formed to leave a separation between said first conductive trace and said second conductive trace, said second conductive trace being connected to an electrostatic discharge path, wherein said electrostatic discharge path comprises a connection to either a circuit ground or a circuit supply voltage.

2. The method of claim 1 wherein said removing step further comprises the step of leaving an edge on said first end of said first conductive trace, said edge having a point located thereon.