Method for forming a monolithic electronic module by dicing wafer stacks
First Claim
Patent Images
1. A method for forming an electronic module comprising the steps of:
- (a) providing a plurality of wafers, each wafer having at least one planar array of multiple chips which has a peripheral shape;
(b) forming a wafer stack by stacking the plurality of wafers so that the at least one planar array of multiple chips of each wafer having the predefined peripheral shape align within the wafer stack; and
(c) dicing the wafer stack along the predefined peripheral shape.
1 Assignment
0 Petitions
Accused Products
Abstract
A fabrication method and resultant monolithic electronic module comprising a plurality of stacked planar extending arrays of integrated circuit chips. The fabrication method includes dicing a wafer of integrated circuit chips into a plurality of arrays of integrated circuit chips. The arrays of integrated circuit chips are then stacked to form an electronic module. A metallization pattern may be deposited on a substantially planar surface of the electronic module, and used to interconnect the various arrays of integrated circuit chips contained therein. Specific details of the fabrication method and resultant multi-chip package are set forth.
-
Citations
16 Claims
-
1. A method for forming an electronic module comprising the steps of:
-
(a) providing a plurality of wafers, each wafer having at least one planar array of multiple chips which has a peripheral shape; (b) forming a wafer stack by stacking the plurality of wafers so that the at least one planar array of multiple chips of each wafer having the predefined peripheral shape align within the wafer stack; and (c) dicing the wafer stack along the predefined peripheral shape. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16)
-
Specification