Multi-bit correlation of continuous phase modulated signals

• US 5,659,574 A
• Filed: 06/07/1995
• Issued: 08/19/1997
• Est. Priority Date: 09/09/1994
• Status: Expired due to Term

• Current Assignee: Intel Corporation
• Original Assignee: Omnipoint Corp. (Deutsche Telekom AG)
• Inventors: Durrant, Randolph L., Burbach, Mark T.
• Primary Examiner(s): Chin, Stephen
• Assistant Examiner(s): GLUCK, JEFFREY WILLIAM
• Application Number:
  US08/481,613
• Time in Patent Office: 804 Days
• Field of Search: 375/200, 375/206, 375/208, 375/209, 375/210, 375/336, 375/343
• US Class Current: 375/150
• CPC Class Codes: H04B 1/707 using direct sequence modulation
• CPC Class Codes: H04B 1/708 Parallel implementation
• CPC Class Codes: H04B 1/7093 Matched filter type
• CPC Class Codes: H04B 2201/70701 featuring pilot assisted reception
• CPC Class Codes: H04J 13/10 Code generation
• CPC Class Codes: H04J 14/005 Optical Code Multiplex
• CPC Class Codes: H04L 27/2014 in which the phase changes in a piecewise linear manner during each symbol period, e.g. minimum shift keying, fast frequency shift keying H04L27/201 takes precedence
• CPC Class Codes: H04L 27/2278 using correlation techniques, e.g. for spread spectrum signals
• CPC Class Codes: H04L 27/2332 using a non-coherent carrier

Abstract

A technique for demodulating CPM spread spectrum signals and variations thereof. A receiver receives a CPM spread spectrum signal, splits it into two signals, demodulates the signals (either coherently or non-coherently) and simultaneously attempts to correlate for a plurality of chip sequences (e.g., I and Q or even and odd), ultimately combining the results into a unified correlation signal. A plurality of A/D converters quantize the demodulated signals into multi-bit digital signals prior to correlation, and multi-bit correlators operate on the multi-bit digital signals to produce correlation signals that are combined to form a unified correlation signal for detection.

Claims

1. A spread spectrum receiver comprising:

means for receiving an input signal,

a first multiplier having inputs coupled to said input signal and a first reference signal,

a second multiplier having inputs coupled to said input signal and a phase-offset version of said first reference signal,

a first filter connected to an output of said first multiplier,

a second filter connected to an output of said second multiplier,

a first multi-bit analog-to-digital converter connected to an output of said first filter,

a second multi-bit analog-to-digital converter connected to an output of said second filter,

a multi-bit serial correlator connected to an output from said first multi-bit analog-to-digital converter and an output from said second multi-bit analog-to-digital converter, said multi-bit serial correlator outputting a unified correlation signal in response thereto, wherein said multi-bit serial correlator comprises;

a third multiplier having inputs connected to an output of said first multi-bit analog-to-digital converter and to a chip signal,

a fourth multiplier having inputs connected to an output of said second multi-bit analog-to-digital converter and to said chip signal,

a first multiplexer connected to an output of said third multiplier and to an output of said fourth multiplier,

a second multiplexer connected to the output of said third multiplier and to an inverse of the output of said fourth multiplier,

a first accumulator connected to an output of said first multiplexer,

a second accumulator connected to an output of said second multiplexer, and

a magnitude calculation block connected to an output of said first accumulator and an output of said second accumulator.

2. The spread spectrum receiver of claim 1 wherein said first and second multiplexers are controlled by a multiplexer clock signal that switches a selected input of each of said first and second multiplexers once each chip period.

3. The spread spectrum receiver of claim 1 wherein said magnitude calculation block comprises a Robertson device.

4. A method for despreading a received continuous phase modulated spread spectrum signal comprising the steps of:

dividing said spread spectrum signal into a first signal and a second signal that are duplicates of one another,

demodulating said first signal into a real-I/imaginary-Q signal, using a first non-coherent local reference signal,

demodulating said second signal into an imaginary-I/real-Q signal, using a second non-coherent local reference signal having the same frequency as said first non-coherent local reference signal but phase offset therefrom by ninety degrees,

converting said real-I/imaginary-Q signal into a first multi-bit digital signal,

converting said imaginary-I/real-Q signal into a second multi-bit digital signal,

generating a chip sequence comprising odd chips and even chips,

correlating said first multi-bit digital signal with the odd chips and an inverse of the even chips of said chip sequence, and accumulating a first pair of correlation totals,

correlating said second multi-bit digital signal with the odd chips and the even chips of said chip sequence, and accumulating a second pair of correlation totals, and

combining said first pair of correlation totals and said second pair of correlation totals to generate a unified correlation output signal,

wherein said steps of correlating said first multi-bit digital signal, accumulating a first pair of correlation totals, correlating said second multi-bit digital signal and accumulating a second pair of correlation totals comprise the steps of;

multiplying said first multi-bit digital signal with said chip sequence to generate a real-I/imaginary-Q product signal,

multiplying said second multi-bit digital signal with said chip sequence to generate an imaginary-I/real-Q product signal,

for said odd chips of said chip sequence, sampling and adding said real-I/imaginary-Q product signal into a first running correlation total, and sampling and adding said imaginary-I/real-Q product signal into a second running correlation total, and

for said even chips of said chip sequence, sampling and adding said imaginary-I/real-Q product signal into said first running correlation total, and sampling and adding an inverse of said real-I/imaginary-Q product signal into said second running correlation total.

5. The method of claim 4 wherein said first running correlation total corresponds to a real correlation signal, and said second running correlation total corresponds to an imaginary correlation signal.

6. The method of claim 5 wherein said step of combining comprises the step of computing a root of a sum of a square of said real correlation signal and a square of said imaginary correlation signal.

7. The method of claim 4 wherein said first multi-bit digital signal and said second multi-bit digital signal each comprise two-bit digital signals.

8. An apparatus for despreading a received continuous phase modulated spread spectrum signal, comprising:

a power divider coupled to an input signal, said power divider having outputs of a first signal and a second signal,

a first multiplier coupled to said first signal and to a first local reference signal, and having as an output a third signal, said first local reference signal not synchronized with a transmitter carrier signal,

a second multiplier coupled to said second signal and to a second local reference signal, and having as an output a fourth signal, said second local reference signal phase offset from said first local reference signal by 90 degrees,

a first low pass filter coupled to said third signal and having as an output a first filtered signal,

a second low pass filter coupled to said fourth signal and having as an output a second filtered signal,

a first multi-bit A/D converter coupled to said first filtered signal, and having as an output a first multi-bit digital signal,

a second multi-bit A/D converter coupled to said second filtered signal, and having as an output a second multi-bit digital signal, and

a multi-bit correlator coupled to said first multi-bit digital signal and said second multi-bit digital signal, said multi-bit correlator generating a real I correlation signal, a real Q correlation signal, an imaginary I correlation signal, and an imaginary Q correlation signal, and having as an output a unified correlation signal, wherein said multi-bit correlator comprises;

a first multiplier having as inputs said first multi-bit digital signal and a chip sequence,

a second multiplier having as inputs said second multi-bit digital signal and said chip sequence,

a first multiplexer coupled to an output of said first multiplier and an output of said second multiplier,

a second multiplexer coupled to an inverse of the output of said first multiplier and to the output of said second multiplier,

a first accumulator coupled to an output of said first multiplexer, said first accumulator outputting a first correlation signal,

a second accumulator coupled to an output of said second multiplexer, said second accumulator outputting a second correlation signal, and

means for combining said first correlation signal and said second correlation signal into said unified correlation signal.

9. The apparatus of claim 8 further comprising a control signal coupled to said first multiplexer and said second multiplexer, whereby said first multiplexer and said second multiplexer each alternates between its respective inputs once each chip period of said chip sequence.

10. The apparatus of claim 8 wherein said means for combining comprises a means for computing a root of a sum of a square of said first correlation signal and a square of said second correlation signal.

11. The apparatus of claim 8 wherein said means for combining comprises a Robertson device.

12. The apparatus of claim 8 wherein said first correlation signal corresponds to a real correlation signal, and said second correlation signal corresponds to an imaginary correlation signal.

13. An apparatus for despreading a received continuous phase modulated spread spectrum signal comprising:

a power divider for dividing said spread spectrum signal into a first and second duplicate signals,

means for demodulating said first duplicate signal into a real-I/imaginary-Q signal, said means comprising a first non-coherent local reference signal,

means for demodulating said second duplicate signal into an imaginary-I/real-Q signal, said means comprising a second non-coherent local reference signal having the same frequency as said first non-coherent local reference signal but phase offset therefrom by 90 degrees,

a first multi-bit analog-to-digital converter coupled to said real-I/imaginary-Q signal, and outputting a first multi-bit signal,

a second multi-bit analog-to-digital converter coupled to said imaginary-I/real-Q signal, and outputting a second multi-bit signal,

means for correlating said first multi-bit signal and said second multi-bit signal with a chip code, and outputting a unified correlation signal thereby, wherein said means for correlating comprises;

a first multiplier for multiplying said first multi-bit signal with a chip sequence and generating a real-I/imaginary-Q product signal thereby,

a second multiplier for multiplying said second multi-bit signal with said chip sequence and generating a real-Q/imaginary-I product signal thereby,

first selection means for selecting a real I component of said real-I/imaginary-Q product signal and a real Q component of said real-Q/imaginary-I product signal,

second selection means for selecting an imaginary Q component of said real-I/imaginary-Q product signal and an imaginary I component of said real-Q/imaginary-I product signal,

a real accumulator coupled to said real I component and said real Q component, outputting a real correlation signal,

an imaginary accumulator coupled to said imaginary I component and said imaginary Q component, outputting an imaginary correlation signal, and

means for combining said real correlation signal and said imaginary correlation signal into said unified correlation signal.

14. The apparatus of claim 13 wherein said first selection means and said second selection means each comprises a multiplexer.

15. The apparatus of claim 13 wherein said means for combining comprises a means for computing a root of a sum of a square of the real correlation signal and a square of the imaginary correlation signal.