Semiconductor device having a single-crystal metal wiring

• US 5,661,345 A
• Filed: 12/01/1994
• Issued: 08/26/1997
• Est. Priority Date: 03/24/1992
• Status: Expired due to Term

• Current Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: Suguro, Kyoichi, Wada, Junichi, Hayasaka, Nobuo, Kaneko, Hisashi, Okano, Haruo
• Primary Examiner(s): Mintel, William
• Assistant Examiner(s): POTTER, ROY KARL
• Application Number:
  US08/353,214
• Time in Patent Office: 999 Days
• Field of Search: 257/767, 257/752, 257/771, 257/754, 257/773
• US Class Current: 257/767
• CPC Class Codes: H01L 21/28512 on semiconductor bodies comprising elements of Group IV of the Periodic Table
• CPC Class Codes: H01L 21/76882 Reflowing or applying of pressure to better fill the contact hole
• CPC Class Codes: H01L 23/5222 Capacitive arrangements or effects of, or between wiring layers other capacitive arrangements H01L23/642
• CPC Class Codes: H01L 23/528 Geometry or layout of the interconnection structure H01L27/0207 takes precedence; algorithms G06F30/00
• CPC Class Codes: H01L 23/53214 the principal metal being aluminium
• CPC Class Codes: H01L 23/53223 Additional layers associated with aluminium layers, e.g. adhesion, barrier, cladding layers
• CPC Class Codes: H01L 23/53233 Copper alloys
• CPC Class Codes: H01L 23/53238 Additional layers associated with copper layers, e.g. adhesion, barrier, cladding layers
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

The method of producing a semiconductor device includes the steps of forming a groove having a predetermined pattern shape on the surface of a substrate; forming a metal film on the substrate while reaction with the surface of the substrate is suppressed; and agglomerating the metal film by in-situ annealing, wherein agglomeration of the metal film is started before the metal film reacts with the surface of the substrate due to annealing, while formation of a native oxide on the metal film is suppressed, and whereby the metal film is filled into the groove by annealing at a predetermined temperature for a predetermined period of time. The structure of the semiconductor device includes an insulator in which there is formed a groove portion having a predetermined pattern shape and an electrode interconnection made of a single-crystal metal which is filled in the groove portion.

Claims

1. A semiconductor device comprising:

an insulator in which there is formed a plurality of groove portions, each of which is kept separate one from the other and having a predetermined shape; and

single-crystal electrode interconnections, filled in the groove portions, each of which differs in crystal orientation thereof.

2. A semiconductor device comprising:

an insulator in which there is formed a groove portion having a predetermined pattern shape; and

an electrode interconnection made of a single-crystal metal which is filled in the groove portion, and a wettability improving layer of polycrystalline or amorphous material is formed between the insulator and the single-crystal metal.

3. A semiconductor device comprising:

a first insulator in which there is formed a groove portion having a predetermined pattern shape;

a second insulator in which there is formed a groove portion having a predetermined pattern shape;

a first electrode interconnection made of a single-crystal metal which is filled in the groove portion in the first insulator; and

a second electrode interconnection made of a single-crystal metal which is filled in the groove portion in the second insulator, and the first and second electrode interconnections are connected with a single-crystal metal which has a same crystal orientation as the first and second electrode interconnections.