Multi-drive controller with encoder circuitry that generates ECC check bytes using the finite field for optical data for appending to data flowing to HDA

• US 5,661,848 A
• Filed: 09/08/1994
• Issued: 08/26/1997
• Est. Priority Date: 09/08/1994
• Status: Expired due to Term

• Current Assignee: Western Digital Corporation
• Original Assignee: Western Digital Corporation
• Inventors: Bonke, Carl E., Worrell, Devon, Nguyen, Kiem, D'Souza, Kenneth
• Primary Examiner(s): Lee, Thomas C.
• Assistant Examiner(s): Chen, Anderson I.
• Application Number:
  US08/302,639
• Time in Patent Office: 1,083 Days
• Field of Search: 364/200, 364/231.5, 364/236, 364/238, 364/239, 364/952, 364/957, 364/968, 364/236.2, 364/238.3, 364/248.1, 364/926.93, 360/48, 360/69, 371/37.7, 395/182.04, 395/439, 395/500, 395/600, 395/800, 395/894
• US Class Current: 711/112
• CPC Class Codes: G06F 3/0601 Interfaces specially adapted for storage systems
• CPC Class Codes: G06F 3/0673 Single storage device
• CPC Class Codes: G11B 20/1833 by adding special lists or symbols to the coded information G11B20/1806, G11B20/1866 take precedence
• CPC Class Codes: G11B 27/034 on discs G11B27/036, G11B27/038 take precedence
• CPC Class Codes: G11B 27/3027 used signal is digitally coded
• CPC Class Codes: G11B 27/329 on a disc [VTOC]
• CPC Class Codes: G11B 27/36 Monitoring, i.e. supervising the progress of recording or reproducing for digital recording G11B20/00 and s.gr.; for monitoring, testing or measuring of TV recorders of the type covered by H04N5/76 and subgroups, see H04N17/06

Abstract

A multiple-drive data-storage system includes a multiple-drive controller, a fixed-media disk drive, and a removable-media, optical-disk disk drive. Preferably, the controller is defined on a printed circuit board assembly attached to a head disk assembly containing the fixed media, and includes a host interface and a command decoder for receiving and decoding commands. A shared buffer memory has allocated storage space for data read from the fixed-media and from the removable optical disks. An error corrector corrects data errors including errors in address-defining data retrieved from headers in the removable optical disks. Caching of data read from the optical disks onto the fixed media allows high speed operation of the combined system and reduced blocking of the host I/O bus.

Claims

1. A multiple-drive controller adapted for use with a host and at least two drive mechanisms, the host having a host interface constituting a first type of interface, one of the two drive mechanisms comprising a player mechanism having means for loading and unloading at least one optical disk therein and having a player-mechanism interface constituting a second type of interface, and the other drive mechanism comprising a head disk assembly (HDA) having fixed media therein and having a HDA interface constituting a third type of interface, the optical disk containing data including ECC check bytes encoded such that a combination of check bytes and a data block define a codeword in a set of Reed Solomon codewords generated over a predetermined finite field, the multiple-drive controller comprising:

at least three independently-operable communication means including;

     1) an I/O communication means compatible with the host interface;

     2) a player-mechanism communication means compatible with the player-mechanism interface; and

     3) a HDA communication means compatible with the HDA interface;

the I/O communication means being shared by the two drive mechanisms and providing for communication of host commands, status, and data via the host interface;

command decoding means shared by the two drive mechanisms for decoding host commands received via the I/O communication means;

buffer memory means shared by the two drive mechanisms;

control means responsive to the command decoding means for providing control signals to cause operations to be performed to cause data to flow through the buffer memory means in paths from the player-mechanism communication means to the I/O communications means and bidirectionally between the I/O communications means and the HDA communications means;

the control means including encoder circuitry for generating ECC check bytes and appending the check bytes to data flowing to the HDA communication means to form a codeword in a set of Reed Solomon codewords generated by the same predetermined finite field used for the optical-disk data.

2. The multiple-drive controller of claim 1, wherein the command decoding means includes a microprocessor.

3. The multiple-drive controller of claim 2, wherein the command decoding means further includes circuit means for partially decoding commands.

4. The multiple-drive controller of claim 1, wherein the control means includes a player-mechanism control means and a HDA control means;

the player-mechanism control means being responsive to the command decoding means for providing player-mechanism control signals to the player-mechanism interface via the player-mechanism communication means to cause a read operation to be performed to cause optical-disk data to be received via the player-mechanism communication means;

the HDA control means being responsive to the command decoding means for operating in parallel with the player-mechanism control means for providing, substantially simultaneously with the player-mechanism control signals, HDA control signals to the HDA interface via the HDA communication means to cause a read operation to be performed to cause fixed-disk data to be received via the HDA communication means.

5. The multiple-drive controller of claim 1, wherein the predetermined finite field is generated by the polynomial:

space="preserve" listing-type="equation">g(x)=x.sup.8 +x.sup.4 +x.sup.3 +x.sup.2 +1.

6. The multiple-drive controller of claim 5, wherein the primitive element of the predetermined finite field is:

space="preserve" listing-type="equation">α

=(00000010).

7. The multiple-drive controller of claim 1, wherein the encoder circuitry is defined within a host interface and disk controller integrated circuit.

8. The multiple-drive controller of claim 1, wherein substantially all of the circuitry for the multiple-drive controller is defined on a printed circuit board assembly, and the printed circuit board assembly is attached to the HDA.

9. The multiple-drive controller of claim 1, wherein a plurality of host commands are received in arbitrary sequences, including a sequence of a first-received read command applicable to the player mechanism to retrieve data stored on an optical disk loaded in the player mechanism, and a second-received read command received at a time prior to the completion of execution of the first-received read command and applicable to the HDA to retrieve data stored on the fixed media, and wherein the multiple-drive controller further comprises:

multi-tasking sequencing means shared by the two drive mechanisms for controlling overlapped sequences of operations performed in execution of decoded commands to cause the I/O communication means to transfer, to the host via the host I/O bus, the data retrieved during the sequentially received read commands.

10. A multiple-drive controller adapted for use with a host, a removable-media drive mechanism, and a fixed-media drive mechanism to utilize the fixed-media drive mechanism to provide caching of data read from the removable-media drive mechanism, the host having a host interface constituting a first type of interface, the removable-media drive mechanism comprising a player mechanism having means for loading and unloading at least one optical disk therein and having a player-mechanism interface constituting a second type of interface, and the fixed-media drive mechanism comprising a head disk assembly (HDA) having fixed media therein and having a HDA interface constituting a third type of interface, the multiple-drive controller comprising:

at least three independently-operable communication means including;

     1) an I/O communication means compatible with the host interface;

     2) a player-mechanism communication means compatible with the player-mechanism interface; and

     3) a HDA communication means compatible with the HDA interface;

the I/O communication means being shared by the two drive mechanisms and providing for communication of host commands, status, and data via the host interface;

command decoding means shared by the two drive mechanisms for decoding host commands received via the I/O communication means;

buffer memory means shared by the two drive mechanisms;

control means responsive to the command decoding means for providing control signals to cause operations to be performed to cause data to flow through the buffer memory means in paths from the player-mechanism communication means to the I/O communication means and bidirectionally between the I/O communication means and the HDA communications means;

the control means further including means for providing control signals to cause operations to be performed to transfer data, without use of the host interface, in a path from the player-mechanism control means to the HDA communication means to provide for the caching of the transferred data in the HDA.

11. The multiple-drive controller of claim 10, wherein the command decoding means includes a microprocessor.

12. The multiple-drive controller of claim 11, wherein the command decoding means further includes circuit means for partially decoding commands.

13. The multiple-drive controller of claim 10, wherein the control means includes a player-mechanism control means and a HDA control means;

the player-mechanism control means being responsive to the command decoding means for providing player-mechanism control signals to the player-mechanism interface via the player- mechanism communication means to cause a read operation to be performed to cause optical-disk data to be received via the player-mechanism communication means;

the HDA control means being responsive to the command decoding means for operating in parallel with the player-mechanism control means for providing, substantially simultaneously with the player-mechanism control signals, HDA control signals to the HDA interface via the HDA communication means to cause a read operation to be performed to cause fixed-disk data to be received via the HDA communication means.

14. The multiple-drive controller of claim 10, wherein substantially all of the circuitry for the multiple-drive controller is defined on a printed circuit board assembly, and the printed circuit board assembly is attached to the HDA.

15. The multiple-drive controller of claim 10, wherein a plurality of host commands are received in arbitrary sequences, including a sequence of a first-received read command applicable to the player mechanism to retrieve data stored on an optical disk loaded in the player mechanism, and a second-received read command received at a time prior to the completion of execution of the first-received read command and applicable to the HDA to retrieve data stored on the fixed media, and wherein the multiple-drive controller further comprises:

multi-tasking sequencing means shared by the two drive mechanisms for controlling overlapped sequences of operations performed in execution of decoded commands to cause the I/O communication means to transfer, to the host via the host I/O bus, the data retrieved during the sequentially received read commands.

16. A multiple-drive controller adapted for use with a host and at least two drive mechanisms, the host having a host interface constituting a first type of interface, one of the two drive mechanisms comprising a player mechanism having means for loading and unloading at least one optical disk therein and having a player-mechanism interface constituting a second type of interface, and the other drive mechanism comprising a head disk assembly (HDA) having fixed media therein and having a HDA interface constituting a third type of interface, the multiple-drive controller comprising:

at least three independently-operable communication means including;

     1) an I/O communication means compatible with the host interface;

     2) a player-mechanism communication means compatible with the player-mechanism interface; and

     3) a HDA communication means compatible with the HDA interface;

the I/O communication means being shared by the two drive mechanisms and providing for communication of host commands, status, and data via the host interface;

command decoding means shared by the two drive mechanisms for decoding host commands received via the I/O communication means;

buffer memory means shared by the two drive mechanisms;

control means responsive to the command decoding means for providing control signals to cause operations to be performed to cause data to flow through the buffer memory means in paths from the player-mechanism communication means to the I/O communication means and bidirectionally between the I/O communication means and the HDA communications means;

the control means further including means for causing optical-disk data defining a table of contents to flow from the player-mechanism communication means to the buffer memory means, and including means for utilizing the table of contents to determine address data for controlling read operations of the player mechanism;

the control means further including buffer manager means;

the buffer manager means including buffer-writing means, buffer-reading means, and buffer-access arbitration means;

the buffer memory means and the buffer manager means being shared by the two drive mechanisms with the buffer-access arbitration means causing the buffer-writing means to be time-shared to store, in the buffer memory means, optical-disk data received from the player mechanism unit fixed-disk data from the HDA and causing the buffer-reading means to be time-shared to retrieve, from the buffer memory means, optical-disk data and fixed-disk data; and

the I/O communication means receiving data from the buffer-reading means, and including means for transferring, to the host via the host interface, such data received from the buffer-reading means.

17. The multiple-drive controller of claim 16, wherein the command decoding means includes a microprocessor.

18. The multiple-drive controller of claim 17, wherein the command decoding means further includes circuit means for partially decoding commands.

19. The multiple-drive controller of claim 16, wherein the control means includes a player-mechanism control means and a HDA control means;

the player-mechanism control means being responsive to the command decoding means for providing player-mechanism control signals to the player-mechanism interface via the player-mechanism communication means to cause a read operation to be performed to cause optical-disk data to be received via the player-mechanism communication means;

the HDA control means being responsive to the command decoding means for operating in parallel with the player-mechanism control means for providing, substantially simultaneously with the player-mechanism control signals, HDA control signals to the HDA interface via the HDA communication means to cause a read operation to be performed to cause fixed-disk data to be received via the HDA communication means.

20. The multiple-drive controller of claim 16, wherein substantially all of the circuitry for the multiple-drive controller is defined on a printed circuit board assembly, and the printed circuit board assembly is attached to the HDA.