Switched leading edge replacement for current sense signal

• US 5,663,667 A
• Filed: 08/19/1996
• Issued: 09/02/1997
• Est. Priority Date: 09/02/1994
• Status: Expired due to Term

• Current Assignee: Semiconductor Components Industries LLC (ON Semiconductor Corporation)
• Original Assignee: Cherry Semiconductor Corp. (ON Semiconductor Corporation)
• Inventors: Blum, Gregory A., Levin, Gedaly
• Primary Examiner(s): Callahan, Timothy P.
• Assistant Examiner(s): ADOLPHE, EUNJA
• Application Number:
  US08/697,038
• Time in Patent Office: 379 Days
• Field of Search: 327/134, 327/380, 327/379, 327/427, 327/170, 327/309, 327/310, 327/312, 327/323, 327/327, 327/328, 327/73, 327/87, 327/389, 327/110, 327/133, 327/136, 327/137, 327/140 , 327/345
• US Class Current: 327/134
• CPC Class Codes: H02M 1/0009 Devices or circuits for detecting current in a converter
• CPC Class Codes: H02M 3/33507 with automatic control of the output voltage or current, e.g. flyback converters H02M3/33561, H02M3/33569 take precedence
• CPC Class Codes: H03K 17/166 Soft switching

Abstract

A method and circuit for reducing the leading edge spike in a current sense signal. The current sense signal is a measure of the current through a switched power device controlled by a switching regulator controller. The slew rate of the current sense signal is limited to prevent the slew rate from exceeding a predetermined maximum. The limited slew rate signal is provided to the switching regulator controller. A transconductance amplifier may be used to limit the slew rate of the current sense signal. A capacitor at the output of the transconductance amplifier contributes to controlling the maximum slew rate of the amplifier. The capacitor is charged by the current output of the amplifier to provide a voltage signal for use in place of the original current sense signal. A switch may be provided for selecting between the slew rate limited current sense signal and the original current sense signal. A time delay may be used to control the switch so that the slew rate limiting is replaced by the original current sense signal after a first predetermined time portion of each "on cycle" of the switched power device.

Claims

1. A method of current sensing comprising:

controlling switched power device with a switching regulator controller;

producing a current sense signal proportional to the current in the switched power device;

providing a rising signal having a controlled slew rate rising from an initial voltage substantially equal to the voltage of the current sense signal when the switched power device is off;

switching the rising signal into connection with the switching regulator controller when the switched power device is switched on;

indicating a delay from when the switched power device is switched on; and

switching off the rising signal to the switching regulator controller after the delay and providing instead the current sense signal to the switching regulator controller.

2. A circuit comprising:

a switching regulator controller for switching a switched power device alternately on and off;

a switch connected to said switching regulator controller for selecting to connect said switching regulator controller to either of a current sense signal having a voltage proportional to a current in the switched power device or a rising signal having a controlled slew rate;

a timer for measuring a predetermined time delay after the switched power device is switched on; and

means for causing said switch to select the rising signal when said switched power device is switched on and for causing said switch to change selection to the current sense signal after the predetermined time delay whereby the rising signal replaces a leading edge of the current sense signal.

3. The circuit of claim 2 wherein said switching regulator controller comprises a current mode control pulse width modulator for comparing the signal from said switch with an error reference signal wherein the rising signal does not cross the error reference signal and thus does not trigger said switching regulator controller.

4. A circuit comprising:

a switching regulator controller for switching a switched power device alternately on and off;

a switch connected to said switching regulator controller for selecting to connect said switching regulator controller to either of a current sense signal having a voltage proportional to a current in the switched power device or a rising signal having a controlled slew rate;

delay means or indicating a delay after the switched power device is switched on; and

means for causing said switch to select the current sense signal after the delay and for causing said switch to change selection to the rising signal when said switched power device is switched on whereby the rising signal replaces a leading edge of the current sense signal.

5. The circuit of claim 4 wherein said switching regulator controller comprises a current mode control pulse width modulator for comparing the signal from said switch with an error reference signal wherein the rising signal does not cross the error reference signal and thus does not trigger said switching regulator controller.

6. A circuit comprising:

a comparator having two inputs and an output for switching a switched power device alternately on and off, one of the two inputs receiving an error reference signal;

a switch connected to an other of the two inputs of said comparator for selecting to connect said comparator to either of a current sense signal having a voltage proportional to a current in the switched power device or a rising signal having an initial voltage substantially equal to the voltage of the current sense signal when the switched power device is off;

delay means or indicating a delay after the switched power device is switched on; and

means for causing said switch to select the current sense signal after the delay and for causing said switch to change selection to the rising signal when said switched power device is switched on, the rising signal not crossing the error reference signal so that said comparator is not triggered while the rising signal is connected to the other input of said comparator.

7. A circuit comprising:

a gain stage having a controlled slew rate, connected for receiving a current sense signal including a meaningful portion proportional to a current in a switched power device and a current spike portion and for generating an output, the maximum slew rate of said gain stage being set so as to attenuate the current spike portion without attenuating the meaningful portion of the current sense signal;

a switching regulator controller connected to receive the output of said gain stage and to control the switched power device; and

a switch connected to said switching regulator controller for selecting between directly receiving either the output of said gain stage or the current sense signal.

8. The circuit of claim 7 further comprising time delay means for causing said switch to change selection from the output of said gain stage to the current sense signal after a predetermined time delay after the switched power device is switched on by said switching regulator controller.

9. A method of current sensing comprising:

controlling switched power device with a switching regulator controller;

producing a sense signal proportional to the current in the switched power device;

limiting the slew rate of the sense signal to produce a slew rate limited sense signal having a slew rate that is prevented from exceeding a predetermined controlled slew rate;

providing the slew rate limited sense signal to the switching regulator controller;

measuring a predetermined time delay following switching on the switched power device; and

switching off the slew rate limited sense signal to the switching regulator controller after the predetermined time delay and providing instead the sense signal to the switching regulator controller.

10. A circuit comprising:

a gain stage connected to receive a current sense signal having a voltage proportional to current in a switched power device, said gain stage generating an output current proportional to the voltage of the current sense signal;

a capacitor coupled to said gain stage so as to be charged by the output current;

a switching regulator controller having an input connected to said capacitor and an output for controlling the switched power device; and

a switch connected to said switching regulator controller for selecting between the voltage on said capacitor and the current sense signal.

11. The circuit of claim 10 further comprising a timer for measuring a predetermined time delay after the switched power device is switched on and means for causing said switch to change selection from the voltage on said capacitor to the current sense signal after the predetermined time delay.

12. A circuit comprising:

means for receiving a current sense signal having a slew rate;

active components, coupled to said receiving means, for producing a modified current sense signal, said active components being arranged to set the modified current sense signal at a predetermined maximum slew rate whenever the slew rate of the current sense signal exceeds the predetermined maximum slew rate, so as to produce modified current sense signal;

a switching regulator controller connected to receive the modified current sense signal and having an output for controlling a switched power device; and

a switch connected to said switching regulator controller for selecting between the modified current sense signal and the current sense signal for input to said switching regulator controller.

13. The circuit of claim 12 further comprising time delay means for causing said switch to change selection from the modified current sense signal to the current sense signal for input to said switching regulator controller after a predetermined time delay following a signal to the output for said switching regulator controller switching on the switched power device.