Computer memory cards using flash EEPROM integrated circuit chips and memory-controller systems
First Claim
1. A computer non-volatile memory system adapted for use with a host computer system that includes a processor, random access volatile memory and input-output circuits operably connected together through a computer system bus, comprising:
- an assembly including a first connector for receiving a memory card and a second connector for removably establishing an electrical connection with the computer system bus, said assembly including a memory controller connectable through the second connector to the computer system bus for (1) receiving address, data and command signals from said bus according to a disk drive protocol and (2) responsively providing data and status signals to said bus according to said disk drive protocol,a plurality of said memory cards which individually include a third connector that mates with the first connector for providing a removable electrical connection therewith, said third connector having conductors connected to an integrated circuit array of floating gate memory cells organized in groups of cells that are individually addressable for simultaneous erasure, said memory cards being fully enclosed in a package having a width less than 5.5 centimeters, a length less than 9.0 centimeters, and a thickness less than 6.0 millimeters, with said third connector being positioned along one edge thereof,said memory controller additionally being responsive to an address of one or more disk drive sectors on conductors of the second connector for accessing through said first and second connectors a corresponding one or more of said memory cell groups within one of the plurality of memory cards having its third connector mated with said first connector.
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Accused Products
Abstract
A very small computer memory card is densely packed with a large number of flash EEPROM integrated circuit chips. A computer memory system provides for the ability to removably connect one or more of such cards with a common controller circuit that interfaces between the memory cards and a standard computer system bus. Alternately, each card can be provided with the necessary controller circuitry and thus is connectable directly to the computer system bus. An electronic system is described for a memory system and its controller within a single memory card. In a preferred physical arrangement, the cards utilize a main circuit board with a plurality of sub-boards attached thereto on both sides, each sub-board carrying several integrated circuit chips.
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Citations
21 Claims
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1. A computer non-volatile memory system adapted for use with a host computer system that includes a processor, random access volatile memory and input-output circuits operably connected together through a computer system bus, comprising:
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an assembly including a first connector for receiving a memory card and a second connector for removably establishing an electrical connection with the computer system bus, said assembly including a memory controller connectable through the second connector to the computer system bus for (1) receiving address, data and command signals from said bus according to a disk drive protocol and (2) responsively providing data and status signals to said bus according to said disk drive protocol, a plurality of said memory cards which individually include a third connector that mates with the first connector for providing a removable electrical connection therewith, said third connector having conductors connected to an integrated circuit array of floating gate memory cells organized in groups of cells that are individually addressable for simultaneous erasure, said memory cards being fully enclosed in a package having a width less than 5.5 centimeters, a length less than 9.0 centimeters, and a thickness less than 6.0 millimeters, with said third connector being positioned along one edge thereof, said memory controller additionally being responsive to an address of one or more disk drive sectors on conductors of the second connector for accessing through said first and second connectors a corresponding one or more of said memory cell groups within one of the plurality of memory cards having its third connector mated with said first connector. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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12. A method of interfacing a non-volatile memory system with a host computer system having a bus including data, address and control lines which interconnect a processor, volatile memory and input-output circuits, comprising the steps of:
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providing a memory system assembly that includes a controller interconnected with both a connector adapted to be connected with the computer system bus and an array of floating gate memory cells organized in blocks of cells that are individually addressable by the controller for simultaneous erasure thereof, responding to the host computer to read data from the non-volatile memory by a method of; receiving from the host computer bus through the connector an address of one or more disk drive sectors and a command to read data stored in the addressed sectors, and temporarily storing said address and command within the controller, in response to the controller reading the stored read command, converting within the controller the stored one or more disk drive sector addresses into an address of one or more of said blocks of non-volatile memory, and reading data stored in said addressed one or more blocks, temporarily storing the read data in the controller and temporarily storing a status word to indicate that the commanded read operation has been completed, thereby to allow the host computer to know from reading the status word that the read data temporarily stored in the controller is ready to be transferred to the host computer through the connector, responding to the host computer to write data to the non-volatile memory by a method of; receiving from the host computer bus through the connector an address of one or more disk drive sectors, a command to write data into the addressed sectors and data to be written into the addressed sectors, temporarily storing said address, command and data within the controller, in response to the controller reading the stored write command, converting within the controller the stored disk drive sectors address into an address of one or more of said blocks of non-volatile memory, and writing into said addressed one or more blocks data that is stored in the controller and temporarily storing a status word in the controller to indicate that the commanded write operation has been completed, thereby to allow the host computer to know from reading the status word that the data write operation has been completed, and comprising an additional step of causing the controller to respond to a disk drive SEEK command from the host computer through the connector to indicate to the host computer that the command has been executed.
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13. A method of interfacing a non-volatile memory system with a host computer system having a bus including data, address and control lines which interconnect a processor, volatile memory and input-output circuits, comprising the steps of:
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providing a memory system assembly that includes a controller interconnected with both a connector adapted to be connected with the computer system bus and an array of floating gate memory cells organized in blocks of cells that are individually addressable by the controller for simultaneous erasure thereof, wherein the memory assembly providing step includes providing the memory array in a first subassembly and the controller in a second subassembly, the first and second subassemblies being mechanically and electrically removably connectable with each other through a matched pair of connectors, responding to the host computer to read data from the non-volatile memory by a method of; receiving from the host computer bus through the connector an address of one or more disk drive sectors and a command to read data stored in the addressed sectors, and temporarily storing said address and command within the controller, in response to the controller reading the stored read command, converting within the controller the stored one or more disk drive sector addresses into an address of one or more of said blocks of non-volatile memory, and reading data stored in said addressed one or more blocks, temporarily storing the read data in the controller and temporarily storing a status word to indicate that the commanded read operation has been completed, thereby to allow the host computer to know from reading the status word that the read data temporarily stored in the controller is ready to be transferred to the host computer through the connector, and responding to the host computer to write data to the non-volatile memory by a method of; receiving from the host computer bus through the connector an address of one or more disk drive sectors, a command to write data into the addressed sectors and data to be written into the addressed sectors, temporarily storing said address, command and data within the controller, in response to the controller reading the stored write command, converting within the controller the stored disk drive sectors address into an address of one or more of said blocks of non-volatile memory, and writing into said addressed one or more blocks data that is stored in the controller and temporarily storing a status word in the controller to indicate that the commanded write operation has been completed, thereby to allow the host computer to know from reading the status word that the data write operation has been completed. - View Dependent Claims (14)
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15. A non-volatile memory system adapted for use with a host system, comprising:
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an assembly including a first connector to receive a memory card and a second connector adapted to removably establish an electrical connection with said host system, said assembly including a memory controller connected to the second connector for (1) receiving address, data and command signals from said host system according to a given protocol and (2) responsively providing data and status signals to said host system according to said given protocol, a plurality of said memory cards which individually include a third connector that mates with the first connector to provide a removable electrical connection therewith, said third connector being connected to an integrated circuit array of floating gate memory cells organized in groups of cells that are individually addressable for simultaneous erasure, said memory cards being fully enclosed in a package having a width less than 5.5 centimeters and a length less than 9.0 centimeters, said memory controller additionally being responsive to an address of one or more disk drive sectors through the second connector for accessing through said first and second connectors a corresponding one or more of said memory cell groups within one of the plurality of memory cards having its third connector mated with said first connector. - View Dependent Claims (16, 17, 18, 19)
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20. A method of interfacing a non-volatile memory system with a host system, comprising:
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connecting a first memory system subassembly including a controller through a first connector to the host system and through a second connector to a second memory system subassembly including an array of floating gate memory cells organized into blocks of cells that are individually addressable by the controller for simultaneous erasure thereof, responding to the host system to read data from the non-volatile memory system by a method of; receiving from the host system an address of one or more data sectors and a command to read data stored in the addressed sectors, and temporarily storing said address and command within the controller, in response to the controller reading the stored read command, converting within the controller the stored data sector address into an address of one or more of said blocks of non-volatile memory, and reading data stored in said addressed one or more blocks, temporarily storing the read data in the controller and temporarily storing a status word to indicate that the commanded read operation has been completed, thereby to allow the host system to know from reading the status word that the read data temporarily stored in the controller is ready to be transferred to the host system, and responding to the host system to write data to the non-volatile memory system by a method of; receiving from the host system an address of one or more data sectors, a command to write data into the addressed sectors and data to be written into the addressed sectors, temporarily storing said address, command and data within the controller, in response to the controller reading the stored write command, converting within the controller the addresses of the stored one or more data sectors into an address of one or more of said blocks of non-volatile memory, and writing into said addressed one or more blocks the data that is stored in the controller and temporarily storing a status word in the controller to indicate that the commanded write operation has been completed, thereby to allow the host system to know from reading the status word that the data write operation has been completed. - View Dependent Claims (21)
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Specification