Method and apparatus for dynamic installation of a driver on a computer system

• US 5,664,195 A
• Filed: 02/20/1996
• Issued: 09/02/1997
• Est. Priority Date: 04/07/1993
• Status: Expired due to Term

• Current Assignee: Radisys Corporation (Reliance Industries Limited)
• Original Assignee: Sequoia Systems, Inc. (Reliance Industries Limited)
• Inventors: Chatterji, Sanjoy
• Primary Examiner(s): Kriess, Kevin A.
• Application Number:
  US08/603,380
• Time in Patent Office: 560 Days
• Field of Search: 395/681, 395/701, 395/712, 395/680
• US Class Current: 717/178
• CPC Class Codes: G06F 9/4411 Configuring for operating with peripheral devices; Loading of device drivers

Abstract

A method is provided for dynamic installation of a driver on a computer system. The computer system has a first operator processor with a first memory and an operating system, a second processor with a second memory and operating code configurable to accept a driver, and a data channel supporting communication between the first processor and the second processor, the first processor sending requests to the second processor for processing. The method includes the steps of: (a) storing a driver in the first memory; (b) uploading a copy of the operating code to the first memory from the second memory; (c) testing the driver for compatibility with a current configuration of the operating code; (d) linking the driver with the copy of the operating code to produce a reinforced operating code in the first memory while the second processor is executing the operating codel and (e) downloading, by the first processor, a copy of the reconfigured operating code to the second memory to switch the second processor from executing the operating code to executing the copy of the reconfigured operating code.

Claims

1. A method for dynamically installing a driver on a computer system, the computer system having a first processor, and a second processor, the method comprising the steps of:

(a) the first processor sending a quiesce command to the second processor, while the second processor operates in a first operating state according to a first operating code;

(b) the second processor, in response to the quiesce command, exiting the first operating state, entering a quiesced state, and sending a notify message to the first processor indicating that the second processor is in the quiesced state;

(c) the first processor, in response to the notify message, queuing a first request sent to the second processor from an external source, and sending the second processor an execute command while the second processor is in the quiesced state;

(d) the second processor, in response to the execute command, exiting the quiesced state, entering a second operating state to operate according to a second operating code having the driver, and sending an acknowledgment message to the first processor indicating that the second processor is in the second operating state;

(e) the first processor, in response to the acknowledgment message, issuing the queued first request to the second processor; and

(f) the second processor executing the issued first request while operating in the second operating state according to the second operating code.

2. The method of claim 1, wherein step (c) includes a step of the first processor queuing the first request in a first queue, and wherein the method further includes a step of the first processor queuing a second request in the first queue.

3. The method of claim 2, wherein the method further comprises a step of the first processor queuing a third request in a second queue, the third request being uncompleted by the second processor before entering the quiesced state.

4. The method of claim 3, wherein step (c) further includes a step of combining the request queued in the first queue with the second request queued in the second queue to form a third queue such that the first processor issues requests queued in the first and second queues from the third queue.

5. The method of claim 4, wherein step (e) includes a step of the first processor issuing the first request from the third queue to the second processor.

6. The method of claim 1, wherein the first processor is associated with a first memory, wherein the second processor is associated with a second memory, and wherein the method further comprises a step of:

the first processor, in response to the notify message, transferring the second operating code from the first memory to the second memory for the second processor to execute.

7. The method of claim 1, wherein step (b) further includes a step of the second processor waiting for a predetermined amount of time before exiting the first operating state and entering the quiesced state.

8. A method for dynamically replacing first operating code with second operating code on a computer system, the computer system having a first processor and a second processor the method comprising the steps of:

(a) the first processor sending a quiesce command to the second processor while the second processor operates in a first operating state according to the first operating code;

(b) the second processor, in response to the quiesce command, exiting the first operating state, entering a quiesced state, and sending a notify message to the first processor indicating that the second processor is in the quiesced state;

(c) the first processor, in response to the notify message, queuing a first request sent to the second processor from an external source, and sending the second processor an execute command, while the second processor is in the quiesced state;

(d) the second processor, in response to the execute command, exiting the quiesced state, entering a second operating state to operate according to the second operating code, and sending an acknowledgment message to the first processor indicating that the second processor is in the second operating state;

(e) the first processor, in response to the acknowledgment message, issuing the queued first request to the second processor; and

(f) the second processor executing the issued first request while operating in the second operating state according to the second operating code.

9. The method of claim 8, and wherein step (c) includes a step of the first processor queuing the first request in a first queue, and wherein the method further includes a step of the first processor queuing a second request in the first queue.

10. The method of claim 9, wherein the method further comprises a step of the first processor queuing a third request in a second queue, the third request being uncompleted by the second processor before entering the quiesced state.

11. The method of claim 10, wherein step (c) further includes a step of combining the first request queued in the first queue with the second request queued in the second queue to form a third queue such that the first processor issues requests queued in the first and second queues from the third queue.

12. The method of claim 11, wherein step (e) includes a step of the first processor issuing the first request and the second request from the third queue to the second processor.

13. The method of claim 8, wherein the first processor is associated with a first memory, wherein the second processor is associated with a second memory, and wherein the method further comprises a step of:

the first processor, in response to the notify message, transferring the second operating code from the first memory to the second memory for the second processor to execute.

14. The method of claim 8, wherein step (b) further includes a step of the second processor waiting for a predetermined amount of time before exiting the first operating state and entering the quiesced state.

15. A computer system for dynamically installing a driver, comprising:

a first processor including a first memory;

a second processor including a second memory; and

a data channel supporting communication between the first processor and the second processor;

wherein the first processor further includes means for sending a quiesce command to the second processor through the data channel, while the second processor operates in a first operating state according to a first operating code stored in the second memory;

means for queuing, in response to a notify message, a first request sent to the second processor from an external source, and sending the second processor an execute command through the data channel, while the second processor is in a quiesced state; and

means for issuing, in response to an acknowledgment message, the first request to the second processor through the data channel; and

wherein the second processor further includes means for exiting, in response to the quiesce command, the first operating state, entering a quiesced state, and sending the notify message to the first processor indicating that the second processor is in the quiesced state;

means for exiting, in response to the execute command, the quiesced state, entering a second operating state to operate according to a second operating code transferred to the second memory from the first memory through the data channel, and sending the acknowledgment message to the first processor indicating that the second processor is in the second operating state; and

means for executing the issued first request while operating in the second operating state according to the second operating code.

16. The computer system of claim 15, wherein the second processor further includes means for waiting for a predetermined amount of time before exiting the first operating state and entering the quiesced state.

17. A method for dynamically replacing first operating code with second operating code on a computer system, the computer system having a first processor and a second processor, the method comprising the steps of:

(a) the second processor, while operating in an operating state according to the first operating code, receiving a first request, executing the first request, and receiving a quiesce command from the first processor;

(b) the second processor, in response to the received quiesce command and before the first request is completely executed, exiting the operating state, and entering a quiesced state;

(c) the first processor queuing the first request in a first queue before the first request is completely executed by the second processor;

(d) the first processor, while the second processor is in the quiesced state, transferring the second operating code from the first memory to the second memory, and sending a resume command to the second processor;

(e) the second processor, in response to the resume command sent from the first processor, exiting the quiesced state and entering the operating state to operate according to the second operating code;

(f) the first processor, after the second operating code is transferred to the second memory, issuing the queued first request to the second processor; and

(g) the second processor, while operating in the operating state according to the second operating code, receiving the first request from the first processor, and executing the first request.

18. The method of claim 17, further comprising a step of:

the first processor, while the second processor is in the quiesced state, queuing a second request in a second queue.

19. The method of claim 18, further comprising a step of:

the first processor combining the first request queued in the first queue the second request queued in the second queue together in one queue such that the first processor issues requests queued in the first and second queues from the one queue.

20. A method for installing a driver on a computer system, the computer system including a first processor coupled to a first memory, and a second processor coupled to a second memory, the method comprising the steps of:

(a) the second processor, while operating in an operating state according to original operating code, receiving a first request, executing the first request, and receiving a quiesce command from the first processor;

(b) the second processor, in response to the received quiesce command and before the first request is completely executed, exiting the operating state, and entering a quiesced state;

(c) the first processor queuing the first request in a first queue before the first request is completely executed by the second processor;

(d) the first processor, while the second processor is in the quiesced state, transferring new operating code including the driver from the first memory to the second memory, and sending a resume command to the second processor;

(e) the second processor, in response to the resume command sent from the first processor, exiting the quiesced state and entering the operating state to operate according to the new operating code;

(f) the first processor, after the new operating code is transferred to the second memory, issuing the queued first request to the second processor; and

(g) the second processor, while operating in the operating state according to the new operating code, receiving the first request from the first processor, and executing the first request.

21. The method of claim 20, further comprising a step of:

the first processor, while the second processor is in the quiesced state, queuing a second request in a second queue.

22. The method of claim 21, further comprising a step of:

the first processor combining the first request queued in the first queue the second request queued in the second queue together in one queue such that the first processor issues requests queued in the first and second queues from the one queue.