Circuit offering sequential discharge and simultaneous charge for a multiple battery system and method for charging multiple batteries

• US 5,666,006 A
• Filed: 05/12/1994
• Issued: 09/09/1997
• Est. Priority Date: 05/12/1994
• Status: Expired due to Term

• Current Assignee: Apple Computer Incorporated (Apple Inc.)
• Original Assignee: Apple Computer Incorporated (Apple Inc.)
• Inventors: Townsley, David B., Blanc, James J.
• Primary Examiner(s): Shoop, Jr., William M.
• Assistant Examiner(s): PALADINI, ALBERT WILLIAM
• Application Number:
  US08/241,594
• Time in Patent Office: 1,216 Days
• Field of Search: 307/66, 307/43, 307/86, 307/50, 307/60, 307/64, 364/273, 364/273.1, 364/273.2, 364/273.3, 364/273.4, 364/273.5, 364/707, 320/2, 320/14, 320/15, 320/5, 320/8, 320/19
• US Class Current: 307/66
• CPC Class Codes: H02J 7/0024 Parallel/serial switching of connection of batteries to charge or load circuit

Abstract

A circuit enabling simultaneous independent charging, sequential charging and sequential discharging of multiple batteries within a computer system and a method for charging the batteries independent of their technology or chemistry. Each battery of the multiple batteries in incorporated within a battery pack. The battery pack includes at least the battery, but may also include a module for supplying information regarding the battery to a system micro-controller unit to assist the system micro-controller unit in charging of the battery. For such battery packs, the method for charging each battery, regardless of its technology or chemistry and without hardware modification or software downloading of information, includes a monitoring phase, a charging phase and an error phase.

Claims

1. A circuit for at least supplying power to a plurality of components through a main power line within a computer system, said circuit comprising:

a first battery selectively chosen to sequentially discharge its power to said plurality of components through a first battery power output line, and alternatively, to receive power to charge said first battery from a first battery power input line;

a second battery selectively chosen to sequentially discharge power to said plurality of components through a second battery power output line, and alternatively, to receive power to charge said second battery from a second battery power input line;

a first switch; and

a first power line selectively coupled to one of the main power line, said first battery power output line and said second battery power output line by enabling at least said first switch, said first power output line provides power to said plurality of components when coupled thereto, charges said first battery when coupled to said first battery power output line, and alternatively charges said second battery when coupled to said second battery power output line.

2. The circuit according to claim 1 further comprising:

a second switch selectively connecting said first battery to said first battery input line;

a third switch selectively connecting said first battery to said first battery output line;

a fourth switch selectively connecting said second battery to said second battery input line; and

a fifth switch selectively connecting said second battery to said second battery output line.

3. The circuit according to claim 2, wherein said first battery sequentially discharges power to said plurality of components if said third switch is enabled and at least said first and fifth switches are disabled, and alternatively, said second battery sequentially discharges power to said plurality of components if said fifth switch is enabled and at least said first and third switches are disabled.

4. The circuit according to claim 2, wherein each of said first through fifth switches is a bilateral FET switch includes a first and second field effect transistor ("FET") switches in series, said first FET switch is oriented in a direction opposite said second FET switch, wherein said first and second FET switches share a common control signal to enable and disable said first switch.

5. The circuit according to 1, wherein said first and second batteries being of a group consisting of Nickel Cadmium, Nickel Metal Hydride and Lithium-Ion batteries.

6. The circuit according to claim 2, wherein said first and second battery input lines are coupled to a second power line, said first and second power lines are coupled correspondingly to a first and second adapter power lines of a power adapter, said power adapter transmitting a first power output through said first adapter power line and a second power output through said second adapter power line.

7. The circuit according to claim 6, wherein said circuit allows said power adapter to supply power to said plurality of components while simultaneously charging said first battery provided said first and second switches are enabled and said third, fourth and fifth switches are disabled.

8. The circuit according to claim 6, wherein said power adapter supplies power to said plurality of components through said main power line while simultaneously charging said second battery, provided said first and fourth switches are enabled and said second, third and fifth switches are disabled.

9. The circuit according to claim 6, wherein said first and second batteries are simultaneously charged by said power adapter, provided said first, second and fifth switches are enabled so that said first power output from said power adapter charges to said second battery and said second power output charges said first battery.

10. The circuit according to claim 6, wherein said first and second batteries are simultaneously charged by said power adapter, provided said first, third and fourth switches are enabled so that said first power output from said power adapter charges said first battery and said second power output charges said second battery.

11. The circuit according to claim 6, wherein said first battery is charged by said first and second power outputs from said power adapter, provided said first, second and third switches are enabled.

12. The circuit according to claim 6, wherein said second battery is charged by said first and second power outputs of said power adapter, provided said first, fourth and fifth switches are enabled.

13. The circuit according to claim 6, wherein said first battery is forced to discharge power to said plurality of components, provided only said fourth switch is enabled.

14. The circuit according to claim 1, wherein said first power line is coupled to a cable line of a power adapter, said power adapter generating an unregulated power output and transmitting said unregulated power output through said cable line and said first power line in order to supply power to said plurality of components, wherein said first switch is enabled to allow said unregulated power output to be transmitted through the main power line while at least said third and fifth switches are disable to preclude transmission of said unregulated power output into said first battery and said second battery, respectively.

15. A computer system comprising:

a bus;

a central processing unit ("CPU") coupled to said bus, said CPU processing data and program instructions;

a memory unit coupled to said bus;

said memory unit contains said data and said program instructions;

a plurality of battery packs, wherein a first battery pack of said plurality of battery packs includes a first battery selectively chosen to supply power to a load being at least one of said CPU and said memory unit or to receive power to charge said first battery, and a second battery pack includes a second battery selectively chosen to supply power to said load or to receive power to charge said second battery;

a battery switching circuit including

a first power line, and

at least a first switch selectively coupling said first power line to one of said load, said first battery and said second battery in order to selectively provide power to said load, to charge said first battery, and alternatively, to charge said second battery; and

a micro-controller unit coupled to said battery switching circuit, said micro-controller unit controls said battery switching circuit.

16. The computer system according to claim 15, wherein said battery switching circuit further comprising:

a second switch selectively connecting said first battery to a first battery input line;

a third switch selectively connecting said first battery to a first battery output line;

a fourth switch selectively connecting said second battery to a second battery input line; and

a fifth switch selectively connecting said second battery to a second battery output line.

17. The computer system according to claim 16, wherein said first and second battery input lines of said battery switching circuit are coupled to a second power line, wherein said first and second power lines are coupled correspondingly to a first and second adapter power lines of a power adapter, said power adapter transmitting a first power output through said first adapter power line and a second power output through said second adapter power line.

18. The computer system according to claim 17, wherein said first and second batteries are simultaneously charged by said power adapter, provided said first, second and fifth switches are enabled so that said first power output from said power adapter charges to said second battery and said second power output charges said first battery.

19. The computer system according to claim 17, wherein said first and second batteries are simultaneously charged by said power adapter, provided said first, third and fourth switches are enabled so that said first power output from said power adapter charges said first battery and said second power output charges said second battery.

20. The computer system according to claim 17, wherein said first battery is charged by said first and second power outputs from said power adapter, provided said first, second and third switches are enabled.

21. The computer system according to claim 17, wherein said second battery is charged by said first and second power outputs of said power adapter, provided said first, fourth and fifth switches are enabled.

22. The computer system according to claim 17, wherein said first battery is forced to discharge power to at least said are, provided only said fourth switch is enabled.

23. The computer system according to claim 16, wherein said first power line is coupled to a cable line of a power adapter, said power adapter generating an unregulated power output and transmitting said unregulated power output through said cable line coupled to said first power line in order to supply power to said plurality of components, wherein said first switch is enabled to allow said unregulated power output to be transmitted to said plurality of components while at least said third and fifth switches are disable to preclude transmission of said unregulated power output into said first battery and said second battery, respectively.

24. The computer system according to claim 15, wherein at least one of said first and second battery packs further includes monitoring circuitry to measure certain characteristics of at least one battery of said first and second batteries and a first module to provide characteristics of said one battery to said micro-controller unit.

25. The computer system according to claim 24, wherein said first module includes a first memory element that contains information about said one battery and an internal micro-controller including a second memory element that contains instruction code to obtain information related to a power level of said one battery and a third memory element for storing program data and dynamic information.

26. A method for controlling discharging and charging of a first and second batteries, coupled to a battery switching circuit within a computer system, by a micro-controller unit coupled to a first and second power lines of said battery switching circuit through a pair of sensing lines, said method comprising the steps of:

sensing whether a DC power output is being supplied to at least said first power line, wherein if said DC power output is being supplied to said at least first power line, sensing whether a second DC power output is being supplied to said second power line, wherein

enabling a plurality of electronic components to receive said DC power output while preventing said first and second batteries from being accessible to said DC power output, if said second DC power output is not supplied to said second power line,

determining whether said computer system is in a high power mode if said second DC power output is supplied to said second power line, wherein

if said computer system is in said high power mode, ensuring that said DC power output is supplied to said

plurality of electronic components, determining whether said first battery is fully charged,

wherein if said first battery is not fully charged, said second DC power output is supplied to said first battery until said first battery is fully charged, and

determining whether said second battery is fully charged, wherein if said second battery is not fully charged, said second DC power output is supplied to said second battery until said second battery is fully charged, and if said computer system is not in said high power mode,

determining whether both said first battery is fully charged, wherein

if both said first and second batteries are not fully charged, simultaneously charging said first and second batteries,

if said first battery is fully charged and said second battery is not fully charged, charging said second battery with said second DC output until completion, and

if said first battery is fully charged and said second battery is not fully charged, charging said second battery with said DC output and said second DC output until completion.

27. The method according to claim 26, wherein if the DC power output is being supplied to both the first and second power lines, the computer system is not in the high power mode and the first battery is fully charged and the second battery is not fully charged, said method further comprising the step of:

determining whether it is desirable to charge said second battery at a fast battery charging rate prior to charging said second battery with said second DC output, wherein if it is desirable to charge said second battery at said fast battery charging rate, said second battery is charged with said DC power output and said second DC power output until completion.

28. The method according to claim 27, wherein if the DC power output is being supplied to both the first and second power lines, the computer system is not in the high power mode and the first battery is not fully charged and the second battery is fully charged, said method further comprising the step of:

determining whether it is desirable to charge said first battery at said fast battery charging rate prior to charging said first battery with said second DC output, wherein if it is desirable to charge said first battery at said fast battery charging rate, said first battery is charged with said DC power output and said second DC power output until completion.

29. The method according to claim 26, wherein if the DC power output is not being supplied to the first power line, said method further comprising the steps of:

determining whether said second battery is storing a sufficient amount of power to operate said computer system in said high power mode, and if so, enabling said second battery to discharge power to said at least one of said plurality of components;

determining whether said first battery is storing said sufficient amount of power to operate said computer system in said high power mode, and if so, enabling said first battery to discharge power to said at least one of said plurality of components; and

placing said computer system in a lower power mode if neither said first and second batteries are storing said sufficient amount of power to operate said computer system in said high power mode.

30. A method for controlling discharging and charging of a first and second batteries, coupled to a battery switching circuit within a computer system, by a micro-controller unit coupled to a first and second power lines of said battery switching circuit through a pair of sensing lines, said method comprising the steps of:

sensing whether a DC power output is being supplied to said first power line, wherein

(i) if said DC power output is not being supplied to said power line, determining whether said second battery is storing a

sufficient amount of power to operate said computer system in a high power mode, wherein if so, said micro-controller unit enabling said second battery to discharge power to said at least one of said plurality of components,

determining whether said first battery is storing a sufficient amount of power to operate said computer system in a high power mode, wherein if so, said micro-controller unit enabling said first battery to discharge power to said at least one of said plurality of components,

placing said computer system in a lower power mode if neither said first and second batteries are storing a sufficient amount of power to operate said computer system in said high power mode, and

(ii) if said DC power output is being supplied to said at least first power line,

sensing by said micro-controller unit whether a second DC power output is being supplied to said second power line, wherein

enabling said plurality of electronic components to receive said DC power output while preventing said first and second batteries from being charged with said DC power output, if said second DC power output is not being supplied to said second power line, and

determining whether said computer system is in said high power mode if said second DC power output is supplied to said second power line, wherein

if said computer system is in said high power mode, ensuring that said DC power output is supplied

to said plurality of electronic components,

determining whether said first battery is fully charged, wherein if said first battery is not fully charged, said second DC power output is supplied to said first battery until said first battery is fully charged, and

determining whether said second battery is fully charged, wherein if said second battery is not fully charged, said second DC power output is supplied to said second battery until said second battery is fully charged,

if said computer system is not in said high power mode, determining whether both said first battery is fully charged, wherein

if both said first and second batteries are not fully charged, said first and second batteries are simultaneously charged,

if said first battery is fully charged and said second battery is not fully charged and a fast battery charge rate is not desired, charging said second battery with said second DC output until completion,

if said first battery is fully charged and said second battery is not fully charged and said fast battery charge rate is desired, charging said second battery with said DC output and said second DC output until completion,

if said first battery is not fully charged and said second battery is fully charged and said fast battery charge rate is not desired, charging said first battery with said second DC output until completion, and

if said first battery is not fully charged and said second battery is fully charged and said fast battery charge rate is desired, charging said first battery with said DC output and said second DC output until completion.

31. For a computer system comprising a micro-controller unit and a plurality of battery packs wherein each of said plurality of battery packs including a battery, monitoring circuitry of said battery to measure and calculate particular characteristics of said battery and a module to store and transmit said particular characteristics of said battery to said micro-controller unit to assist said micro-controller unit in independently charging said battery, a method comprising the steps of:

performing a monitoring operation to determine whether said battery requires charging by a power source;

performing a charging operation on said battery in the event that said battery requires charging; and

performing an error detection to determine operation if an error occurs in performing one of said monitoring operation or said charging operation.

32. The method according to claim 31, wherein said charging operation includes the steps of:

checking whether it is desirable for said battery to undergo an initial charge operation to ascertain whether said battery is shorted, and if so, performing said initial charge operation;

checking whether it is desirable for said battery to undergo a bulk charge operation, and if so, performing said bulk charging operation to charge said battery until detection of a charge termination condition; and

checking whether it is desirable for said battery to undergo a pulse maintenance charge operation to maintain said battery at an energy level.

33. The method according to claim 32, wherein said initial charge operation comprising the steps of:

(i) comparing a measured voltage of said battery to a static shorted cell voltage, wherein said battery is suspected to be shorted if said measured voltage is less than said shorted cell voltage; and

(ii) continuously applying a predetermined amount of power to said battery if said measured voltage is less than said shorted cell voltage to verify whether said battery is shorted, wherein said battery is determined to be shorted if said measured voltage of said battery fails to rise above said static shorted cell voltage before a prescribed period of time.

34. The method according to claim 33, wherein said bulk charge operation comprising the steps of:

(i) enabling a connection between said power source and said battery so that said power source is able to charge said battery; and

(ii) comparing said measured voltage of said battery to a minimum threshold voltage to determine whether to bypass a plurality of charge termination checks, wherein

if said measured voltage of said battery is less than said minimum threshold voltage, said plurality of charge termination checks are bypassed, wherein said bulk charging operation terminates if a temperature of said battery is at least equal to a predetermined temperature, and alternatively

if said measured voltage of said battery is at least equal to said minimum threshold voltage, said plurality of charge termination checks are performed by said micro-controller unit, wherein said bulk charging operation is terminated if one of said plurality of charge termination checks indicates that said battery is experiencing a charge termination condition corresponding to said one of said plurality of charge termination checks.

35. The method according to claim 34, wherein said monitoring operation comprising the steps of:

determining whether said battery is coupled to said computer system;

verifying that said power source for charging said battery is powered thereby having an ability to charge power said battery;

determining whether said monitoring operation has been performed in a prior cycle, wherein if said monitoring operation has not been performed in said prior cycle, said micro-controller unit performing the following steps;

comparing a value of a percentage of charge capacity remaining in said battery as measured by said monitoring circuit to a value of a threshold percentage of charge capacity, and

determining whether a temperature of said battery is between a maximum threshold temperature and a minimum threshold temperature to ensure charging of said battery at an appropriate battery temperature, provided said percentage of charge capacity remaining in said battery is less than said threshold percentage of charge capacity.