Graphics display system including graphics processor having a register storing a series of vertex data relating to a polygonal line

• US 5,666,520 A
• Filed: 03/21/1994
• Issued: 09/09/1997
• Est. Priority Date: 03/29/1993
• Status: Expired due to Fees

• Current Assignee: Hitachi, Ltd.
• Original Assignee: Hitachi, Ltd., Hitachi Microcomputer System Limited
• Inventors: Ozawa, Koji, Fujita, Ryo, Koga, Kazuyoshi, Takami, Kazuhisa, Soga, Mitsuru, Morishige, Takaharu
• Primary Examiner(s): Tung, Kee M.
• Application Number:
  US08/215,244
• Time in Patent Office: 1,268 Days
• Field of Search: 395/140-143, 395/162-166, 395/501, 395/513, 345/10, 345/11, 345/13, 345/16
• US Class Current: 345/559
• CPC Class Codes: G06T 1/20 Processor architectures; Processor configuration, e.g. pipelining
• CPC Class Codes: G06T 11/203 Drawing of straight lines or curves

Abstract

A graphics display system includes a host processor calculating graphic data and providing the graphic data to a graphics processor, and frame memories which store the graphic pixel data and supply display data to display devices. The graphics display system also includes a first register group which stores the graphics data, a second register group which converts and/or stores the data in the first register group, a pixel generator which generates pixels according to the graphic data in the second register group, and a plotter which writes the pixel data generated in the pixel generator in the frame memories. The second register group fetches the data from the first register group when the host processor issues a command for plotting, holds the data previously written by the host processor. At the same time, when the host processor issues a command for plotting, the specified graphic type is written in the graphic processor as sell as data calculated based on the first and second register groups.

Claims

1. A graphics display system comprising:

a host processor providing in an order a series of vertex data of a polygonal line defined with a plurality of straight lines to generate an order for displaying the polygonal lines;

a graphic processor including a register storing the series of vertex data, a graphic pixel generator converting the vertex data to graphic pixel data of the straight line, and a plotter writing the graphic pixel data from the graphic pixel generator; and

a frame memory storing the graphic pixel data written by the plotter;

a display displaying the graphic pixel data from the frame memory;

wherein the register comprises a first start point register storing start point data corresponding to a first of the straight lines, a first end point register storing end point data corresponding to the first of the straight lines based on the vertex data, a second start point register storing start point data corresponding to a second of the straight lines which is connected to the first of the straight lines, and a second end point register storing end point data of said second of the straight lines, wherein said second start point data and said second end point data are converted to the graphic pixel data; and

wherein said first start point register stores the end point of the first end point register, said second start point register stores the start point of the first start point register, and said second end point register stores the end point of the first end point register when the host processor generates the order; and

wherein data stored in the first start point register and data stored in the first end point register are read out to be stored in a memory before the host processor processes an interrupting order, and said data stored in the memory is restored to the first start point register and the first end point register after the host processor has processed the interrupting order.