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DMOS fabrication process implemented with reduced number of masks

  • US 5,668,026 A
  • Filed: 03/06/1996
  • Issued: 09/16/1997
  • Est. Priority Date: 03/06/1996
  • Status: Expired due to Term
First Claim
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1. A method for fabricating a DMOS transistor supported on a substrate comprising steps of:

  • (a) growing an oxide layer on said substrate;

    (b) applying a first mask for removing said oxide layer to define an active area and for selectively patterning said oxide layer for keeping a plurality of source implant blocking stumps near a plurality of source regions in said substrate wherein said blocking stumps being formed with width greater than twice a diffusion length of a source dopant;

    (c) applying a second mask for forming a plurality of gates covering a portion of areas between said blocking stumps thus defining an implant window;

    (d) implanting a body dopant through said implant window followed by a body diffusion for forming body regions underneath said blocking stumps wherein said blocking stumps are patterned with width less than twice a diffusion length of said body dopant whereby said body regions merge together in said body diffusion and become a single body region underneath said blocking stumps; and

    (e) implanting said source dopant through said implant window over said source implant blocking stumps following by a source diffusion for forming separate source regions underneath said blocking stumps.

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