Method for processing semiconductor wafer with reduced particle contamination during saw

• US 5,668,062 A
• Filed: 08/23/1995
• Issued: 09/16/1997
• Est. Priority Date: 08/23/1995
• Status: Expired due to Term

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Texas Instruments, Inc.
• Inventors: Hyun, Dae-Jin, Connor, James L.
• Primary Examiner(s): Breneman, R. Bruce
• Assistant Examiner(s): ALEJANDRO MULERO, LUZ L
• Application Number:
  US08/518,434
• Time in Patent Office: 755 Days
• Field of Search: 437/226
• US Class Current: 438/462
• CPC Class Codes: B81C 1/00888 Multistep processes involving only mechanical separation, e.g. grooving followed by cleaving

Abstract

A method of processing a semiconductor wafer (12) to form micromechanical devices. Extended scribe lines (20) are provided from centrally located integrated circuit scribe lines (16) to provide a saw street that extends to the perimeter of the wafer. Micromechanical devices (14), including those of the DMD type, can be fabricated without a layer of protective oxide while reducing the generation of conductive particles during the wafer saw process which could otherwise degrade the operation of the micromechanical devices having movable elements. The extended scribe lines (20) are fabricated at the same time that the conventional scribe lines (16) are formed about the integrated circuits (14).

Claims

1. A method of processing a semiconductor wafer, comprising the steps of:

a) defining primary circuit scribes in said wafer to define an active circuit processing area;

b) defining a semiconductor circuit in said active circuit processing area; and

c) defining at least one secondary scribe in said wafer being continuous with said primary circuit scribe and extending to proximate said wafer edge, said secondary scribe extending between non-active wafer portions of said semiconductor wafer.

2. The method as specified in claim 1 further comprising the step of defining said secondary scribe to be collinear with said primary circuit scribe.

3. The method as specified in claim 1 further comprising the step of defining said primary circuit scribes to define at least one rectangular said active circuit processing area, with a plurality of said secondary scribes extending from corners of said circuit rectangular active processing area.

8. The method as specified in claim 1, further comprising the step of forming a micromechanical device as said semiconductor circuit.

4. A semiconductor wafer, comprising:

a) a primary circuit scribe in said wafer defining at least one active circuit processing area;

b) a semiconductor circuit defined in said active circuit processing area; and

c) at least one secondary scribe extending from said primary circuit scribe to proximate said wafer edge, said secondary scribe extending between nonactive wafer portions of said semiconductor wafer.

5. The semiconductor wafer as specified in claim 4 wherein said primary circuit scribe defines a rectangular said active circuit processing area, and one said secondary scribe extends from at least one said corner of said active circuit processing area and being collinear with one side of said active circuit processing area.

6. The semiconductor wafer as specified in claim 4 wherein said primary circuit scribe forms a grid about a plurality of said active circuit processing areas, and said secondary scribes extend from the outermost corners of said grid to said wafer edge.

7. The semiconductor wafer as specified in claim 4 wherein said semiconductor circuit comprises a micromechanical device.