Input panel avoiding interference pattern and method of forming the same

• US 5,668,353 A
• Filed: 03/17/1995
• Issued: 09/16/1997
• Est. Priority Date: 03/18/1994
• Status: Expired due to Term

• Current Assignee: Fujitsu Component Limited (Fujitsu Limited)
• Original Assignee: Fujitsu Limited
• Inventors: Matsuda, Genichi, Tanaka, Toshiaki
• Primary Examiner(s): Kuntz, Curtis
• Assistant Examiner(s): Shankar, Vijay
• Application Number:
  US08/406,323
• Time in Patent Office: 914 Days
• Field of Search: 178/18, 178/19, 178/20, 345/156, 345/157, 345/166, 345/173, 345/174, 345/175, 345/176
• US Class Current: 178/18.05
• CPC Class Codes: G06F 3/045 using resistive elements, e.g. a single continuous surface or two parallel surfaces put in contact

Abstract

An input panel of a resistance layer type includes a first board having a first transparent conductive layer on its surface and a second board having a second transparent conductive layer on its surface. The first board and the second board are arranged such that the first transparent conductive layer faces the second transparent conductive layer. The input panel further includes first spacers arranged between the first board and the second board, the first spacers being non-conductive and having a height no greater than 14 μm, and second spacers arranged between the first board and the second board among the first spacers, the second spacers being non-conductive and having a height no smaller than 15 μm.

Claims

1. An input panel of a resistance layer type comprising:

a first board having a first transparent conductive layer on one surface;

a second board having a second transparent conductive layer on one surface, said first board and said second board being arranged such that said first transparent conductive layer faces said second transparent conductive layer;

first spacers arranged between said first board and said second board, said first spacers being non-conductive and having a height no greater than 14 μ

m; and

second spacers arranged between said first board and said second board among said first spacers, said second spacers being non-conductive and having a height no smaller than 15 μ

m.

2. The input panel as claimed in claim 1, wherein said first spacers and said second spacers are formed in a dot shape or a mesh shape.

3. The input panel as claimed in claim 1, wherein said second spacers are arranged at intervals from 0.5 mm to 20 mm, and said first spacers are arranged at smaller intervals.

4. An input panel of a resistance layer type comprising:

a first board having a first transparent conductive layer on one surface;

a second board having a second transparent conductive layer on one surface, said first board and said second board being arranged such that said first transparent conductive layer faces said second transparent conductive layer;

first spacers arranged between said first board and said second board, said first spacers being non-conductive; and

second spacers arranged between said first board and said second board among said first spacers, said second spacers being non-conductive and having such a height that no interference pattern is generated, wherein said first spacers have such a height smaller than that of said second spacers that an appropriate input sensitivity of said input panel can be achieved.

5. A method of forming an input panel of a resistance layer type, said method comprising the steps of:

a) forming first spacers on a first transparent conductive layer formed on a first board, said first spacers being non-conductive and having a height no greater than 14 μ

m;

b) forming second spacers on said first transparent conductive layer, said second spacers being non-conductive and having a height no smaller than 15 μ

m; and

c) placing a second board on said second spacers such that a second transparent conductive layer formed on one surface of said second board faces said first transparent conductive layer.

6. The method as claimed in claim 5, wherein said step b) comprises a step of forming second spacers by using a photoresist in a photo process.

7. The method as claimed in claim 5, wherein said step b) comprises a step of forming second spacers by using a thermoplastic resin, a thermosetting resin, or an optical-setting resin in a printing process.

8. The method as claimed in claim 5, wherein said step b) comprises the steps of:

forming second spacers as small balls or particles made of a resin material, an inorganic material, or a combination of an organic material and an inorganic material; and

scattering said second spacers on said first transparent conductive layer.

9. The method as claimed in claim 8, wherein said step b) further comprises a step of adhering said second spacers to said first transparent conductive layer by using an adhesive.

10. The method as claimed in claim 8, wherein said step of scattering said second spacers comprises a step of scattering said second spacers by using a mask which has holes at predetermined locations and is placed on said first transparent conductive layer, so that said second spacers can be positioned at said predetermined locations.