×

Diffusion barrier trilayer for minimizing reaction between metallization layers of integrated circuits

  • US 5,668,411 A
  • Filed: 07/23/1996
  • Issued: 09/16/1997
  • Est. Priority Date: 03/28/1995
  • Status: Expired due to Term
First Claim
Patent Images

1. A diffusion barrier trilayer for semiconductor wafers, comprising:

  • a bottom metal layer;

    a seed metal layer adjacent said bottom layer and having a crystalline structure; and

    a top metal layer adjacent said seed metal layer and having a crystalline structure;

    wherein said crystalline structures of said top metal layer and said seed metal layer are single-crystal-like, and wherein said crystalline structure of said top metal layer is aligned to said crystalline structure of said seed metal layer,wherein said bottom layer comprises TiN, said seed metal layer comprises Ti, and said top metal layer comprises TiN.

View all claims
  • 0 Assignments
Timeline View
Assignment View
    ×
    ×