Multilayer ceramic chip capacitor
First Claim
1. A multilayer ceramic chip capacitor having a capacitor chip comprising alternately stacked dielectric layers and internal electrode layers, whereinsaid dielectric layers comprise a dielectric layer material which comprises barium titanate, magnesium oxide, yttrium oxide, at least one selected from barium oxide and calcium oxide, silicon oxide, manganese oxide, and at least one selected from vanadium oxide and molybdenum oxide in such a proportion that there are presentMgO:
- 0.1 to 3 molY2 O3 ;
more than 0 to 5 molBaO+CaO;
2 to 12 molSiO2 ;
2 to 12 molMnO;
more than 0 to 0.5 molV2 O5 ;
0 to 0.3 molMoO3 ;
0 to 0.3 molV2 O5 +MoO3 ;
more than 0 molper 100 mol of BaTiO3, provided that the barium titanate, magnesium oxide, yttrium oxide, barium oxide, calcium oxide, silicon oxide, manganese oxide, vanadium oxide, and molybdenum oxide are calculated as BaTiO3, MgO, Y2 O3, BaO, CaO, SiO2, MnO, V2 O5, and MoO3, respectively, and whereinsaid dielectric layer material comprises crystal grains having a mean grain size of up to 0.45 μ
m, and whereinin an X-ray diffraction chart of said dielectric layer material, a diffraction line of (200) plane and a diffraction line of (002) plane overlap one another to form a wide diffraction line which has a half-value width of up to 0.35°
.
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Accused Products
Abstract
The invention provides a multilayer ceramic chip capacitor which satisfies X7R property or a temperature response of its capacitance and shows a minimal change of capacitance with time under a DC electric field, a long accelerated life of insulation resistance (IR) and good DC bias performance and also provides a multilayer ceramic chip capacitor which is resistant to dielectric breakdown in addition to the above advantages. In a first form of the invention, dielectric layers contain BaTiO3 as a major component and MgO, Y2 O3, at least one of BaO and CaO, and SiO2 as minor components in a specific proportion. In a second form, the dielectric layers further contain MnO and at least one of V2 O5 and MoO3 as minor components in a specific proportion. In the first form, the dielectric layer has a mean grain size of up to 0.45 μm, and in an X-ray diffraction chart of the dielectric layer, a diffraction line of (200) plane and a diffraction line of (002) plane at least partially overlap one another to form a wide diffraction line which has a half-value width of up to 0.35°.
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Citations
11 Claims
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1. A multilayer ceramic chip capacitor having a capacitor chip comprising alternately stacked dielectric layers and internal electrode layers, wherein
said dielectric layers comprise a dielectric layer material which comprises barium titanate, magnesium oxide, yttrium oxide, at least one selected from barium oxide and calcium oxide, silicon oxide, manganese oxide, and at least one selected from vanadium oxide and molybdenum oxide in such a proportion that there are present MgO: - 0.1 to 3 mol
Y2 O3 ;
more than 0 to 5 molBaO+CaO;
2 to 12 molSiO2 ;
2 to 12 molMnO;
more than 0 to 0.5 molV2 O5 ;
0 to 0.3 molMoO3 ;
0 to 0.3 molV2 O5 +MoO3 ;
more than 0 molper 100 mol of BaTiO3, provided that the barium titanate, magnesium oxide, yttrium oxide, barium oxide, calcium oxide, silicon oxide, manganese oxide, vanadium oxide, and molybdenum oxide are calculated as BaTiO3, MgO, Y2 O3, BaO, CaO, SiO2, MnO, V2 O5, and MoO3, respectively, and wherein said dielectric layer material comprises crystal grains having a mean grain size of up to 0.45 μ
m, and whereinin an X-ray diffraction chart of said dielectric layer material, a diffraction line of (200) plane and a diffraction line of (002) plane overlap one another to form a wide diffraction line which has a half-value width of up to 0.35°
. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
- 0.1 to 3 mol
Specification