Traffic controller for cell-based transmission

• US 5,668,797 A
• Filed: 12/06/1995
• Issued: 09/16/1997
• Est. Priority Date: 12/06/1995
• Status: Expired due to Term

• Current Assignee: Pmc-Sierra Limited (Microchip Technology Incorporated)
• Original Assignee: PMC-Sierra Incorporated (Microchip Technology Incorporated)
• Inventors: Fahmi, Maher Nihad, Bradshaw, John Richard
• Primary Examiner(s): TON, DANG T
• Application Number:
  US08/568,379
• Time in Patent Office: 650 Days
• Field of Search: 370/13, 370/60, 370/60.1, 370/94.1, 370/94.2, 370/84, 370/229, 370/230, 370/232-235, 370/252, 370/358, 370/389, 370/391, 370/392, 370/395, 370/412, 370/413, 370/416
• US Class Current: 370/229
• CPC Class Codes: H04J 3/0632 Synchronisation of packets and cells, e.g. transmission of voice via a packet network, circuit emulation service [CES] queuing arrangements in packet switching elements H04L49/90; synchronising systems for the synchronous transmission of a pulse code modulated video signal with one or more other pulse code modulated signals H04N7/56
• CPC Class Codes: H04L 12/5602 Bandwidth control in ATM Networks, e.g. leaky bucket
• CPC Class Codes: H04L 2012/5636 Monitoring or policing, e.g. compliance with allocated rate, corrective actions
• CPC Class Codes: H04L 2012/5651 Priority, marking, classes

Abstract

A device for identifying cells as either conforming or non-conforming in a cell-based transmission system, which includes an n-bit word-length counter having an input coupled to a source of clock pulses, a parallel n-word gate coupled to a parallel output of the n-bit word length counter and having a gate input coupled to a source of cell arrival signals. A processor is coupled to an output of gate having a first comparer for comparing TAT and t_a (k), a second comparer for comparing t_a (k)[n-1] with zero and t_a (k-1)[n-1] with 1, a setting device for setting TAT=t_a (k) in the event that either of the comparisons in the first and second comparers are true. A third comparer is provided for comparing TAT and t_a (k)+L and if TAT is less than or equal to t_a (k)+L, an indexing device for indexing TAT by I and declaring the cell conforming, and an output device for declaring the cell non-conforming if TAT is greater than t_a (k)+L.

Claims

1. A system for determining compliance of cells in a cell based transmission system having an initial theoretical cell arrival time, TAT, the system comprising:

(a) an n-bit word-length counter having an input coupled to a source of clock pulses;

(b) a parallel n-bit word-length gate coupled to a parallel output of said n-bit word-length counter and having a gate input coupled to a source of cell arrival signals;

(c) a processor coupled to an output of said gate, having

(i) means for determining each of (aa) if TAT is less than an arrival time for a k^th cell, t_a (k), where k is an integer, and (bb) if in (n-1)^th bit of t_a (k), namely t_a (k)[n-1], is zero and an (n-1)^th bit of an arrival time for a (k-1)^th cell, namely t_a (k-1)[n-1], is one;

(

ii) means for setting TAT equal to t_a (k) if either of the two conditions (aa) and (bb) in (c)(i) are true;

(iii) means for determining if TAT is greater than t_a (k)+L, where L is a limit value for cell time of arrival variation, if each of the two conditions in (c)(i) are not true;

(iv) means for identifying a cell non-conforming if TAT is greater than t_a (k)+L; and

(v) means for incrementing TAT by a numeric value I and identifying a cell conforming if either of the two conditions in (c)(i) are true or the condition in (c)(iii) is not true.

2. A system according to claim 1, including a one_-- second_-- update flag generator for a one second update flag having an output coupled to an input of said processor and an output of said processor coupled to a reset input of said one_-- second_-- update flag generator and a set input coupled to a user setable clock wherein when said flag is set, said means for setting TAT sets TAT equal to t_a (k).

5. A system according to claim 1, including memory coupled to said processor operative to store values of t_a (k), t_a (k-1), TAT, L and I.

3. A method of determining compliance or non-compliance of an arriving cell, comprising:

(a) measuring a time of arrival of a k^th cell, namely t_a (k), where k is an integer value initially equal to 1;

(b) setting a theoretical arrival time, TAT, equal to t_a (k);

(c) incrementing k by the integer value one;

(d) measuring a time of arrival of a cell k, namely t_a (k);

(e) testing if TAT is less than t_a (k);

(f) testing if a most significant bit of t_a (k), namely t_a (k)[n-1], is zero, and if a most significant bit of a time of arrival of a (k-1)^th cell, namely t_a (k-1)[n-1], equals one;

(g) setting TAT equal to t_a (k), if the result of either step (e) or (f) is yes;

(h) determining if TAT is greater than t_a (k)+L, where L is a limit value for cell time of arrival variation;

(i) declaring said k^th cell to be non-conforming if the answer to step (h) is yes;

(j) incrementing TAT by a numeric value I and declaring said k^th cell to be conforming if the answer to step (h) is no;

(k) incrementing k by 1; and

(l) repeating steps (d) to (l) inclusive for each subsequent arriving cell.

4. A method according to claim 3, including after step (c), (d), or (e) comparing a one_-- second_-- update flag to one and, if said one second update flag is one, setting TAT equal to t_a (k) and after indexing TAT or declaring a cell to be non-conforming, clearing the one_-- second_-- update flag and returning to step (c).