Monolithic-hybrid radiation detector/readout

• US 5,670,817 A
• Filed: 03/03/1995
• Issued: 09/23/1997
• Est. Priority Date: 03/03/1995
• Status: Expired due to Term

• Current Assignee: Santa Barbara Research Center
• Original Assignee: Santa Barbara Research Center
• Inventors: Robinson, David A.
• Primary Examiner(s): TRAN, MINH LOAN
• Application Number:
  US08/397,818
• Time in Patent Office: 935 Days
• Field of Search: 257/442, 257/443, 257/446, 257/458, 257/461, 250/208.1, 250/332, 250/370.08, 250/370.12, 250/370.13, 250/370.14
• US Class Current: 257/443
• CPC Class Codes: H01L 27/1465 of the hybrid type

Abstract

Methods are disclosed for fabricating a monolithic array of radiation detectors and associated readout circuits, as are monolithic arrays fabricated by the methods. One method includes the steps of (a) providing a first substrate (10) having a first major surface (10a) and an oppositely disposed second major surface (10b); (b) doping the first major surface with a dopant having a first type of electrical conductivity to form a first doped region (12) adjacent to the first major surface; (c) forming an electrically insulating dielectric layer (14) on the first major surface; (d) thermally bonding a second substrate to the dielectric layer and thinning the second substrate to provide a semiconductor layer (16) having a predetermined thickness; (e) delineating the semiconductor layer into a plurality of adjacently disposed electrically isolated regions each of which corresponds to a radiation detector unit cell; (f) fabricating a readout integrated circuit (17) within a portion of the semiconductor layer within each of the unit cells; (g) conductively coupling (22, 23) each of the readout integrated circuits to an underlying portion of the first doped region; and (h) doping the second major surface with a dopant having a second type of electrical conductivity to form a second doped region (24) adjacent to the second major surface. The second major surface is a radiation receiving surface of the monolithic array.

Claims

1. A monolithic array of photodiodes and readout integrated circuits, comprising:

a substrate comprised of a semiconductor material, said substrate having a first major surface and an oppositely disposed radiation receiving second major surface, said substrate having a first doped region adjacent to said first major surface that is doped with a dopant having a first type of electrical conductivity, said substrate having a second doped region adjacent to said second major surface that is doped with a dopant having a second type of electrical conductivity;

means for partitioning said first doped region of said substrate into a plurality of adjacently disposed and electrically isolated areas each of which corresponds to one photodiode unit cell;

wherein each of said unit cells includes,

an electrically insulating dielectric layer disposed on said first major surface;

a semiconductor layer disposed on said electrically insulating dielectric layer, said semiconductor layer comprising a unit cell readout integrated circuit; and

an electrode directly connecting said readout integrated circuit to an underlying portion of said first doped region;

said monolithic array further comprising a common electrode disposed over said second major surface.

2. An array as set forth in claim 1, wherein said partitioning means is comprised of:

a counter-doped region of the substrate surrounding said underlying portion of said first doped region.

3. An array as set forth in claim 1, wherein said partitioning means is comprised of:

trenches formed through said underlying dielectric layer, through said underlying first doped region, and partially into said substrate; and

a dielectric material filling said trenches.

4. An array as set forth in claim 1 and further comprising means for individually addressing individual ones of said readout integrated circuits.

5. A monolithic array of photodiodes and readout integrated circuits, comprising:

a substrate comprised of a semiconductor material, said substrate having a first major surface and an oppositely disposed radiation receiving second major surface, said substrate having a first doped layer region adjacent to said first major surface that is doped with a dopant having a first type of electrical conductivity, said substrate having a plurality of counter-doped regions formed through said first doped layer region, each of said counter-doped regions being doped with a dopant having a second type of electrical conductivity, said substrate further having a second doped layer region adjacent to said second major surface that is doped with a dopant having the first type of electrical conductivity;

wherein

each of said plurality of counter-doped regions is conductively coupled to an associated readout integrated circuit that is formed within a bonded oxide semiconductor layer that overlies said first major surface and that is electrically insulated therefrom by an intervening layer of dielectric bonding oxide, each of said counter-doped regions and associated readout integrated circuits being associated with one photodiode unit cell having a photodiode comprised of the associated counter-doped region, a portion of said second doped layer region, and an intervening portion of said substrate; and

wherein

a portion of said first doped layer region that surrounds each of said counter-doped regions functions as a channel stop.

6. An array as set forth in claim 5 wherein said monolithic array further comprises a common electrode disposed over said second major surface.

7. An array as set forth in claim 5 and further comprising means for individually addressing individual ones of said readout integrated circuits.