Signal processing apparatus
First Claim
1. A signal processing circuit for processing output signals from a CCD (charge-coupled device) imager of a multiple read-out type having horizontal and vertical blanking periods for receiving light signals from an iris and on which respective pilot signals are superimposed, comprising:
- a plurality of variable gain amplifiers for receiving said output signals from said CCD imager to produce respective amplified signals;
a first loop circuit operable to adjust respective gains of said plurality of variable gain amplifiers;
an iris control circuit operable to control said iris on the basis of said amplified signals;
a second loop circuit operable at least once during each horizontal blanking period of said CCD image to similarly adjust said respective pilot signals at a desired level;
a third loop circuit operable at least once during each horizontal blanking period of said CCD imager to equalize the levels of said respective pilot signals; and
control means for controlling said first loop circuit, said iris control circuit, said second loop circuit, and said third loop circuit to operate during respective different time intervals in a predetermined cycle, said predetermined cycle being repeated at least once during each vertical blanking period of said CCD imager.
1 Assignment
0 Petitions
Accused Products
Abstract
A signal processing apparatus includes a first loop circuit for adjusting gains of a plurality of variable gain amplifiers to which signals output from a charge-coupled device (CCD) imager of multiple-channel reading type are applied, a control circuit for driving and controlling an iris in accordance with output signals from the plurality of variable gain amplifiers, a second loop circuit for adjusting levels of pilot signals to be superimposed upon the output signals of the CCD imager at a desired level, respectively, a third loop circuit for controlling levels of the pilot signals which are superimposed upon the output signals of the CCD imager so as to be coincident with each other, and a control unit for controlling the first loop circuit and the control circuit, the second loop circuit, and the third loop circuit so that they are operated in a time-division fashion.
-
Citations
12 Claims
-
1. A signal processing circuit for processing output signals from a CCD (charge-coupled device) imager of a multiple read-out type having horizontal and vertical blanking periods for receiving light signals from an iris and on which respective pilot signals are superimposed, comprising:
-
a plurality of variable gain amplifiers for receiving said output signals from said CCD imager to produce respective amplified signals; a first loop circuit operable to adjust respective gains of said plurality of variable gain amplifiers; an iris control circuit operable to control said iris on the basis of said amplified signals; a second loop circuit operable at least once during each horizontal blanking period of said CCD image to similarly adjust said respective pilot signals at a desired level; a third loop circuit operable at least once during each horizontal blanking period of said CCD imager to equalize the levels of said respective pilot signals; and control means for controlling said first loop circuit, said iris control circuit, said second loop circuit, and said third loop circuit to operate during respective different time intervals in a predetermined cycle, said predetermined cycle being repeated at least once during each vertical blanking period of said CCD imager. - View Dependent Claims (2, 3, 4, 5, 6)
-
-
7. A camera, comprising:
-
an iris; a CCD (charge-coupled device) imager of a multiple read-out type having horizontal and vertical blanking periods for receiving light signals from said iris and for superimposing respective pilot signals on said light signals; a plurality of variable gain amplifiers for receiving output signals from said CCD imager to produce respective amplified signals; a first loop circuit operable to adjust respective gains of said plurality of variable gain amplifiers; an iris control circuit operable to control said iris on the basis of said amplified signals; a second loop circuit operable at least once during each horizontal blanking period of said CCD imager to similarly adjust said respective pilot signals at a desired level; a third loop circuit operable at least once during each horizontal blanking period of said CCD imager to equalize the levels of said respective pilot signals; and control means for controlling said first loop circuit, said iris control circuit, said second loop circuit, and said third loop circuit to operate during respective different time intervals in a predetermined cycle, said predetermined cycle being repeated at least once during each vertical blanking period of said CCD imager. - View Dependent Claims (8, 9, 10, 11, 12)
-
Specification