Computer program architecture for onboard vehicle diagnostic system

• US 5,671,141 A
• Filed: 04/05/1993
• Issued: 09/23/1997
• Est. Priority Date: 04/05/1993
• Status: Expired due to Fees

• Current Assignee: Ford Global Technologies, LLC (Ford Motor Company)
• Original Assignee: Ford Global Technologies, LLC (Ford Motor Company)
• Inventors: Smith, Paul Frederick, Ferch, Eric Blaine, Armitage, John Frederick
• Primary Examiner(s): Bowler, Alyssa H.
• Assistant Examiner(s): Davis, Walter D.
• Application Number:
  US08/043,192
• Time in Patent Office: 1,632 Days
• Field of Search: 395/800, 395/650, 364/424.03, 364/424.04, 364/442, 364/431.01, 340/438
• US Class Current: 701/29
• CPC Class Codes: B60R 16/0315 using multiplexing techniques multiplexing for transmission of signals G08C15/00; multiplexing for electrical communication in general H04J
• CPC Class Codes: B60W 10/04 including control of propulsion units
• CPC Class Codes: B60W 2050/0006 Digital architecture hierarchy
• CPC Class Codes: B60W 2050/021 Means for detecting failure or malfunction
• CPC Class Codes: B60W 50/0205 Diagnosing or detecting failures; Failure detection models
• CPC Class Codes: F02D 2041/1411 using a finite or infinite state machine, automaton or state graph for controlling or modelling
• CPC Class Codes: F02D 41/22 Safety or indicating devices for abnormal conditions in air/fuel ratio feedback systems F02D41/1495, in electric control linkage F02D11/107, in purge control systems F02M25/0809
• CPC Class Codes: G06F 11/2242 in multi-processor systems, e.g. one processor becoming the test master G06F11/2736 takes precedence
• CPC Class Codes: G06F 11/326 for error or online/offline status

Abstract

A computer program architecture for a motor vehicle on-board diagnostic system includes a plurality of monitor modules for monitoring vehicle systems or components and issuing a malfunction subroutine call to a diagnostic executive upon detecting a system or component malfunction. The executive includes a plurality of software objects or modules for carrying out malfunction indicator light control and fault code storage strategies. A diagnostic scheduler module implemented as a finite state machine, controls and coordinates the sequence of the test to be run by the monitor modules as well as on-demand self tests. A malfunction indicator light (MIL) control module implements four distinct light control strategies through finite machines for illuminating and extinguishing the light and for storing and erasing fault codes under predetermined conditions.

Claims

1. A computer program architecture for a motor vehicle on-board diagnostic system including a computer having read only, random access, and keep alive memory, comprising:

a plurality of monitor modules for monitoring respective ones of a plurality of vehicle systems or components and for issuing a malfunction subroutine call upon detecting and verifying a system or component malfunction,

an executive program module interfaced with said monitor modules and including a diagnostic scheduler module for controlling and coordinating a sequence of enablement of said monitor modules, a malfunction indicator light (MIL) controller module for issuing a store code subroutine call and illuminating a light in response to a malfunction subroutine call, a codes module responsive to said store code subroutine call for storing a fault code in said keep alive memory,

wherein said scheduler module disables said monitor modules and enables and controls the sequence of running of a plurality of on-demand self test routines in response to a self test command, and

wherein said self test routines include an engine running test, an engine off test, and an output test mode, said scheduler suspending execution of any monitor module test in response to said self test command and returning to the suspended test upon completion of the self test.

2. The program architecture defined in claim 1 wherein system configuration data is contained in read only memory which establishes which of said plurality of monitor modules are available to perform a test, said scheduler module utilizing said data in determining said sequence.

3. The program architecture defined in claim 1 wherein said executive program module further comprises a system failure mode effects management module for advising said scheduler module of any monitor module in said sequence that should not be enabled because of an existing system or component malfunction.

4. The program architecture defined in claim 1 wherein said MIL controller module initiates an erase code subroutine call to request erasure of the stored fault code if said store code subroutine call is not issued within a predetermined number of engine warm-up cycles after the light is extinguished wherein a warm-up cycle is defined as vehicle operation, after an engine off period, with engine coolant temperature at least a first predetermined temperature which is a predetermined number of degrees warmer than when the engine was initially started.

5. The program architecture defined in claim 1 wherein said executive program module further comprises a trips module for issuing a trip complete subroutine call in response to completion of all system monitor routines during vehicle operation following an engine off period.

6. The program architecture defined in claim 5 wherein said MIL controller module is responsive to said malfunction subroutine call and to said trip completion subroutine calls for controlling the illumination of said light in accordance with a predetermined sequence of malfunction and/or trip completion events.

7. The program architecture defined in claim 5 wherein said MIL controller module illuminates said light and initiates said store code subroutine call if a malfunction is detected following each of two separate power up sequences of the computer and extinguishes said light if said malfunction does not recur within three sequential trips of the vehicle following illumination of the light.

8. The program architecture defined in claim 7 wherein said fault code is erased after a predetermined number of engine warm-ups, following extinguishing of said light, without a recurrence of said malfunction.

9. The program architecture defined in claim 5 wherein said vehicle includes a catalytic converter system and one of said system monitor modules reports a malfunction in the converter system, and wherein said MIL controller module illuminates said light and initiates said store code subroutine call event after three sequential malfunction occurrences on separate power up sequences, and extinguishes said light if said malfunction does not recur within three sequential trips of the vehicle following illumination of the light.

10. The program architecture defined in claim 9 wherein said fault code is erased after a predetermined number of engine warm-ups, following extinguishing of said light, without a recurrence of said malfunction.

11. The program architecture defined in claim 1 wherein said executive program module further comprises a freeze frame data module for capturing predetermined vehicle data and for storing captured data in a freeze frame data record in keep alive memory in response to a store freeze frame subroutine call from said MIL controller module, said MIL controller module issuing said freeze frame subroutine call upon receipt of a malfunction subroutine call from one of said monitor modules.

12. The program architecture defined in claim 1 wherein said executive program module further comprises a drive cycle module, a closed loop flag that is cleared during each power up initialization of said computer, said drive cycle module setting said closed loop flag when the vehicle enters closed loop fuel control operation, to provide an indication of completion of a driving cycle, said MIL controller module including a similar conditions module which sets a similar conditions seen flag if engine speed is within a predetermined number of rpm, engine load is within a predetermined percentage, and engine temperature status is the same, to those that existed when a first malfunction was detected.

13. The program architecture defined in claim 12 wherein said MIL controller module illuminates said light and initiates a store code subroutine call if a type A misfire malfunction is detected and extinguishes said light if said malfunction does not recur during three sequential driving cycles in which said similar conditions seen flag is set.

14. The program architecture defined in claim 13 wherein said fault code is erased after a predetermined number of engine warm-ups, following extinguishing of said light, without a recurrence of said malfunction.

15. The program architecture defined in claim 12 wherein said MIL controller module illuminates said light and issues said store code subroutine call, if a malfunction is detected following each of two separate power up sequences of the computer and extinguishes said light if said malfunction does not recur during three sequential driving cycles in which said similar conditions seen flag is set.

16. The program architecture defined in claim 15 wherein said fault code is erased after a predetermined number of engine warm-ups, following extinguishing of said light, without a recurrence of said malfunction.

17. The program architecture defined in claim 15 wherein the first occurrence of a malfunction is ignored if said similar conditions seen flag is set prior to the second occurrence of a malfunction or if a predetermined number of trips occur without said similar conditions seen flag being set.