Memory subsystem with disk meshing, controller meshing, and efficient cache buffer lookup

• US 5,671,385 A
• Filed: 04/29/1994
• Issued: 09/23/1997
• Est. Priority Date: 04/29/1993
• Status: Expired due to Term

• Current Assignee: SBC Technology Resources, Inc. (AT&T, Inc.)
• Original Assignee: Southwestern Bell Technology Resources, Inc. (AT&T, Inc.)
• Inventors: Jost, Larry T.
• Primary Examiner(s): Chan, Eddie P.
• Assistant Examiner(s): BRAGDON, REGINALD GLENWOOD
• Application Number:
  US08/235,714
• Time in Patent Office: 1,243 Days
• Field of Search: 395/404, 395/440, 395/441, 395/412, 395/416
• US Class Current: 711/4
• CPC Class Codes: G06F 12/0866 for peripheral storage systems, e.g. disk cache
• CPC Class Codes: G06F 2212/1044 Space efficiency improvement

Abstract

In a data processing system, source block addresses are linearly mapped to virtual linear target disks equal in size to actual physical disks comprised by the long-term storage. Blocks of the virtual linear target disks are then assigned to disk-meshed disks equal in size to the actual physical disks whereby each block within a set of adjacently addressed linear target disk blocks is assigned to a separate disk-meshed disk. Controller meshing may be performed by assigning each disk-meshed disk to a controller-meshed disk which will comprise the actual physical disk, whereby respective sets of blocks within respective disk-meshed disks, all having the same disk controller, are assigned to equal-sized controller-meshed disks located on different disk controllers. Additional mechanisms that may be provided in the data processing system include efficient cache buffer lookup linked lists, and a mechanism for accelerating processing performed by an ancillary processing mechanism by ignoring a delay time.

Claims

1. A data processing system comprising:

a processor that operates on various data, said processor comprising means for specifying a source block address that corresponds to a requested data block located within a memory to be accessed by said processor;

a hierarchical memory system comprising a cache and long-term storage;

linear mapping means for linearly mapping source block addresses to virtual linear target disks equal in size to actual physical disks comprised by said long-term storage, so that each data block requested by said processor is identified by a virtual linear target disk address, including an assigned linear target disk and a linear target disk offset within an assigned linear target disk, said source block addresses identifying requested data blocks according to a source addressing scheme of said processor; and

disk meshing means for assigning blocks of the virtual linear target disks, mapped by said mapping means from said source block address to said virtual linear target disk address, to disk-meshed disks equal in size to the actual physical disks comprised by said long-term storage, wherein each said requested data block is assigned to one disk-meshed disk, and requested data blocks having adjacent source block addresses are assigned to different disk-meshed disks,

wherein said disk meshing means comprises means for dividing said virtual linear target disks into sets of N linear target disks, and means for meshing the source block addresses of each said virtual linear target disk within a particular virtual linear target disk set into N separate meshed disks.

2. The data processing system according to claim 1, further comprising controller meshing means for assigning each disk-meshed disk to a controller-meshed disk which will comprise the actual physical disk, wherein respective sets of blocks within respective disk-meshed disks all having the same disk controller are assigned to equal-sized controller-meshed disks located on different disk controllers.

3. The data processing system according to claim 1, wherein said disk meshing means further comprises:

means for calculating a remainder of (a number of said requested data blocks per actual physical disk)/N;

template generating means for dividing a total number of said requested data blocks per actual physical disk, substantially as evenly as possible, into a set of N meshed disk chunk sizes which comprise sizes of a disk-meshed disk which will be needed to collectively hold all of said total number of said requested data blocks per actual physical disk; and

means for assigning, for each said virtual linear target disk, chunk sizes that correspond to each disk-meshed disk within a set of N meshed disks to which requested data blocks of the virtual linear target disk may be meshed, so that all requested data blocks of all virtual linear target disks have a space, defined as part of a chunk size, within a disk-meshed disk in said set of N meshed disks,

wherein N represents a disk mesh factor of said disk meshing means.

4. The data processing system according to claim 1, further comprising means for utilizing assignment information of said disk meshing means, said utilizing means translating a source block address into a physical target disk address, if necessary, during I/O control of said hierarchical memory system.

5. The data processing system according to claim 1, further comprising means for dividing the total number of target disks into two target disk subsets, said linear mapping means comprising means for linearly mapping source block addresses to virtual linear target disks, equal in size to the actual physical disks comprised by said long-term storage and equal in number to 1/2 of the actual physical disks comprised by said long-term storage, said data processing system further comprising means for performing RAID 1 disk mirroring.

6. The data processing system according to claim 1, further comprising a storage control processor comprising means for providing processor access to said requested data block within said cache, means for transferring data between a processor memory and said cache, and means for transferring data between said cache and said long-term storage, said storage control processor comprising a mainframe storage controller.

7. In a data processing system comprising a processor that operates on various data and specifies a source block address that corresponds to a requested data block located within a memory to be accessed by the processor, and a hierarchical memory system comprising a cache and a long-term storage, a storage control method comprising:

linearly mapping source block addresses to virtual linear target disks equal in size to actual physical disks comprised by the long-term storage, so that each data block requested by the processor is identified by a virtual linear target disk address, including an assigned linear target disk and a linear target disk offset within the assigned linear target disk, said source block addresses identifying requested data blocks according to a source addressing scheme of said processor;

performing disk meshing by assigning blocks of the virtual linear target disks to disk-meshed disks equal in size to the actual physical disks comprised by the long-term storage, wherein each said requested data block is assigned to one disk-meshed disk, and source blocks having adjacent source block addresses are assigned to a different disk-meshed disk and dividing said virtual linear target disks into sets of N linear target disks; and

meshing the source block addresses of each said virtual linear target disk within a particular virtual linear target disk set into N separate meshed disks, wherein N represents a disk mesh factor utilized in performing disk meshing.