Interface for transmitting graphics data to a printer from a host computer system in rasterized form

• US 5,671,445 A
• Filed: 08/02/1995
• Issued: 09/23/1997
• Est. Priority Date: 07/19/1993
• Status: Expired due to Term

• Current Assignee: Oki Data Americas Incorporated (OKI Electric Industry Company Limited)
• Original Assignee: OKI America
• Inventors: Scarrow, John L., Horanzy, Joseph A., Gluyas, Stephen David
• Primary Examiner(s): Harvey, Jack B.
• Assistant Examiner(s): WILEY, DAVID ARMAND
• Application Number:
  US08/510,437
• Time in Patent Office: 783 Days
• Field of Search: 395/873
• US Class Current: 710/53
• CPC Class Codes: G06F 3/121 Facilitating exception or error detection and recovery, e.g. fault, media or consumables depleted
• CPC Class Codes: G06F 3/1236 Connection management
• CPC Class Codes: G06F 3/1285 Remote printer device, e.g. being remote from client or server
• CPC Class Codes: G06F 3/1295 Buffering means

Abstract

A data transmission system transmits data from a first device to an interface device at a continuous rate and includes a first device for storing data and for transmitting data at a first data output rate. An interface device outputs data at a second data output rate different from the first data output rate. A preload buffer initially receives a predetermined amount of data from the first device and stores the initially received data. The preload buffer also transmits at least a portion of the initially received data at a third data output rate. The preload buffer receives additional data from the first device as the initially received data is transmitted from the preload buffer. A first buffer and a second buffer of generally equal size are sized to receive a single block of data from the preload buffer. The size of the single block of data is less than the predetermined amount of output data initially received and stored in the preload buffer. The first buffer first receives a block of data from the preload buffer and then transmits the block of data to the interface device. The second buffer first receives a block of data from the preload buffer and then transmits the block of data to the interface device. The first and second buffers are arranged so that when one of the buffers is receiving data from the preload buffer, the other buffer is transmitting data to the interface device. The interface device receives data from the first and second buffers at a rate sufficient for the interface device to continuously maintain the second data output rate.

Claims

1. A data transmission system for transmitting data comprising:

a first device having an output for outputting data at a first data output rate;

a preload buffer having an input connected to the output of the first device for initially receiving a predetermined amount of data from the first device and storing the initially received data, the preload buffer having an output for transmitting at least a portion of the initially received data, the preload buffer receiving additional data from the first device as the initially received data is transmitted from the preload buffer;

first and second alternating buffers having inputs connected to the output of the preload buffer for alternatingly receiving data from the preload buffer, the first and second buffers each being sized to receive a single block of data at a time from the preload buffer, the single block of data having a size less than the predetermined amount of data initially received and stored in the preload buffer, the first and second buffers each alternatingly receiving a sequential block of data from the preload buffer,

the first buffer having an output for outputting a received block of data while the second buffer is receiving a block of data from the preload buffer,

the second buffer having an output for outputting a received block of data while the first buffer is receiving a block of data from the preload buffer; and

an interface device having inputs connected to the outputs of the first and second buffers for alternatingly receiving sequential blocks of data from the first and second buffers, the interface device also having a static random access memory for storing the alternatingly received blocks of data and an output for outputting data from the static random access memory at a second data output rate different from the first data output rate.

2. The system according to claim 1, wherein said first device is a host computer.

3. The system according to claim 1, wherein said interface device is an input/output device.

4. The system according to claim 3, further comprising a second device connected to said interface device, said second device receiving the data from the interface device at the second data output rate.

5. The system according to claim 4, wherein said second device is a printer.

6. The system according to claim 4, wherein said second device is a facsimile machine.

7. The system according to claim 4, wherein said second device is a scanner.

8. The system according to claim 5, wherein said second data output rate is approximately 200 kilobytes per second.

9. The system according to claim 1, wherein the preload buffer is static in size.

10. The system according to claim 1, wherein the preload buffer is dynamic in size.

11. The system according to claim 1, wherein the preload buffer comprises a storage area for storing a plurality of data blocks, each data block being generally equal in size.

12. The system according to claim 11, wherein said first and second buffers are a pair of direct memory access buffers.

13. The system according to claim 12, wherein said direct memory access buffers are the same size as each of the preloading data blocks.

14. An interface for transmitting data from a data storage device having a first data output rate to an input/output device having a second data input/output rate which must be continuously maintained, the second data input/output rate being different from the first data output rate, the interface comprising:

a data bus for receiving the data from the data storage device at the first data output rate;

a buffer memory in communication with the data bus for initially receiving and storing a predetermined amount of the data;

first and second alternating buffers for alternatingly receiving sequential pre-determined size blocks of data from the buffer memory at a first predetermined rate after the buffer memory has initially received the predetermined amount of data from the data storage device, the first and second buffers each receiving a single block of data at a time from the buffer memory, the single block of data having a size less than the predetermined amount of data initially received and stored in the buffer memory,

the first buffer outputting a received block of data while the second buffer is receiving a block of data from the buffer memory,

the second buffer outputting a received block of data while the first buffer is receiving a block of data from the buffer memory;

a static random access memory for alternatingly receiving and storing sequential blocks of data from the first and second buffers at a second predetermined rate different from the first predetermined rate, the stored data in the static random access memory being transported from the static random access memory into a continuous data stream such that a series of spaced bits is formed, the data stream being delivered to the input/output device at a rate of speed such that the input/output device substantially maintains the second data input/output rate.

15. The interface according to claim 14, further comprising a serial interface for transporting the stored data from the static random access memory.

16. The interface according to claim 14, further comprising a parallel interface for transporting the stored data from the static random access memory.

17. The interface according to claim 14 further comprising an SCSI interface for transporting the stored data from the static random access memory.

18. The interface according to claim 14, further comprising:

determining means for determining if a difference exists between the data written into the memory means and the data read from the memory means;

error means for indicating an error if the difference between the data written into the memory means and the data read from the memory means is greater or less than a predetermined value; and

disabling means for disabling the input/output device when an error is detected by the determining means.

19. The interface according to claim 18, wherein said determining means is a subtractor circuit.

20. The interface according to claim 14, wherein said second data input/output rate is approximately 200 kilobytes per second.