Biphasic defibrillation isolation circuit and method

• US 5,674,266 A
• Filed: 06/27/1996
• Issued: 10/07/1997
• Est. Priority Date: 06/27/1996
• Status: Expired due to Fees

• Current Assignee: Zoll Medical Corporation (Asahi Kasei Corporation)
• Original Assignee: SurVivaLink Corporation (Cardica Incorporated)
• Inventors: Stendahl, Gary B.
• Primary Examiner(s): Getzow, Scott M.
• Application Number:
  US08/672,698
• Time in Patent Office: 467 Days
• Field of Search: 607/5, 607/63
• US Class Current: 607/63
• CPC Class Codes: A61N 1/3912 Output circuitry therefor, e.g. switches
• CPC Class Codes: A61N 1/3931 Protecting, e.g. back-up systems

Abstract

Apparatus for providing a solid state patient isolator circuit capable of conducting bipolar portions of a biphasic defibrillation pulse when the isolator circuit is ON and further capable of isolating circuitry upstream or downstream of the patient isolator when the isolator circuit is OFF. The apparatus includes series connected solid state switching devices having a resistor ladder connected in parallel therewith to balance voltages across the solid state switching devices when the devices are OFF. The solid state switching devices are selected from among the group of uni-directionally conducting solid state switches and are connected between the intermediate nodes of a four diode bridge having an input node and an output node.

Claims

1. An external defibrillator high voltage patient isolation circuit for selectively delivering and isolating high voltage biphasic waveform defibrillation pulses, the patient isolation circuit comprising:

a biphasic pulse generating circuit;

a diode bridge circuit having diodes connected between an input terminal and an output terminal and having a pair of intermediate terminals, wherein one of the input and output terminals is connected to the biphasic pulse generating circuit and the other of the input and output terminals is adapted for connection to defibrillation electrodes;

a pair of solid state switching devices connected together in series across the pair of intermediate terminals; and

a pair of resistors, with each one of the pair of resistors connected across one of the pair of switching devices to balance voltages across the switching devices

wherein the isolation circuit will provide a high impedance to block biphasic high voltages at either of the input or output terminal from appearing at the other of the input or output terminal when the switching devices are OFF, and a low impedance between the input and output terminals to provide a path for biphasic defibrillation pulses between the biphasic pulse generating circuit and the terminal adapted for connection to defibrillation electrodes when the switching devices are ON.

2. The apparatus of claim 1 wherein the switching devices are SCR'"'"'s.

3. The apparatus of claim 1 wherein the switching devices are FET'"'"'s.

4. The apparatus of claim I wherein the switching devices are IGBT'"'"'s.

5. A method of selectively providing patient isolation in a biphasic external defibrillator comprising the steps of:

a) providing a diode bridge circuit having diodes connected between an input terminal and an output terminal and having a pair of intermediate terminals;

b) connecting one of the input and output terminals to a means for providing a source of biphasic high voltage and connecting the other of the input and output terminals to a means for connecting defibrillation pulses to a patient electrode;

c) connecting at least one unipolar conducting solid state switching device across the pair of intermediate terminals;

d) turning the solid state switching device ON to establish a biphasic conduction path between the input and the output terminals; and

e) turning the solid state switching device OFF to block conduction between the input terminal and the output terminal.

6. The method of claim 5 wherein the switching device of step c) further comprises a first device and step c) further comprises connecting a second unipolar conducting solid state switching device in series with the first device across the intermediate terminals and connecting a resistive ladder across the first and second devices to balance the voltages across each of the series connected first and second devices in the OFF condition.

7. The method of claim 5 wherein the switching device is selected from among the group consisting of SCR'"'"'s, FET'"'"'s and IGBT'"'"'s.