Process of fabricating a self-aligned thin-film transistor for a liquid crystal display
First Claim
1. A process for fabricating a self-aligned thin-film transistor comprising the steps of:
- depositing a conductive layer on a transparent insulating substrate;
etching said conductive layer so as to form a gate electrode together with gate lines;
forming a triple layer consisting of a gate insulating layer, a semiconductor layer and an extrinsic semiconductor layer sequentially deposited over said substrate;
etching said triple layer so that only a part thereof covering said gate electrode remains to form an active pattern;
depositing a transparent conductive layer over said substrate to form a drain electrode part by etching said transparent conductive layer so that a part of said transparent conductive layer remains overlapping said gate electrode;
depositing a negative photoresist over said substrate;
exposing said negative photoresist to a light supplied from the back of said transparent substrate opposite said gate and developing the thus-exposed negative photoresist;
forming a drain electrode by removing a part of said transparent conductive layer appearing in a region over said gate from which said photoresist is removed;
depositing a conductive layer over said substrate to form a source electrode together with data lines, by etching said conductive layer so that there remains a portion of said conductive layer opposite to said drain electrode with respect to said gate electrode; and
removing a portion of said extrinsic semiconductor layer exposed over said gate electrode so as to form a channel.
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Accused Products
Abstract
A self-aligned thin-film transistor, fabricated by depositing a conductive layer on a transparent insulating substrate, etching the conductive layer so as to form a gate electrode together with gate lines, forming a triple layer having of a gate insulating layer, a semiconductor layer and an extrinsic semiconductor layer sequentially deposited over the substrate, etching the triple layer so that only a part thereof covering the gate electrode only remains to form an active pattern, depositing a transparent conductive layer over the substrate to form a drain electrode part by etching the transparent conductive layer so that a part of the transparent conductive layer remains overlapping the gate electrode, depositing a negative photoresist over the substrate, exposing the negative photoresist to a light supplied from the back of the transparent substrate opposite the gate and developing the thus-exposed photoresist, forming a drain electrode by removing the part of a transparent conductive layer appearing in a region over the gate wherefrom the photoresist is removed, depositing a conductive layer over the substrate to form a source electrode together with data lines by etching the conductive layer so that there remains a portion of the conductive layer opposite to the drain electrode with respect to the gate electrode, and removing a portion of the extrinsic semiconductor layer exposed over the gate electrode so as to form a channel.
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Citations
10 Claims
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1. A process for fabricating a self-aligned thin-film transistor comprising the steps of:
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depositing a conductive layer on a transparent insulating substrate; etching said conductive layer so as to form a gate electrode together with gate lines; forming a triple layer consisting of a gate insulating layer, a semiconductor layer and an extrinsic semiconductor layer sequentially deposited over said substrate; etching said triple layer so that only a part thereof covering said gate electrode remains to form an active pattern; depositing a transparent conductive layer over said substrate to form a drain electrode part by etching said transparent conductive layer so that a part of said transparent conductive layer remains overlapping said gate electrode; depositing a negative photoresist over said substrate; exposing said negative photoresist to a light supplied from the back of said transparent substrate opposite said gate and developing the thus-exposed negative photoresist; forming a drain electrode by removing a part of said transparent conductive layer appearing in a region over said gate from which said photoresist is removed; depositing a conductive layer over said substrate to form a source electrode together with data lines, by etching said conductive layer so that there remains a portion of said conductive layer opposite to said drain electrode with respect to said gate electrode; and removing a portion of said extrinsic semiconductor layer exposed over said gate electrode so as to form a channel. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A process for fabricating a self-aligned thin-film transistor comprising the steps of:
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depositing a conductive layer on a transparent insulating substrate; etching said conductive layer so as to form a gate electrode together with gate lines; forming a triple layer consisting of a gate-insulating layer, a semiconductor layer and an extrinsic semiconductor layer sequentially deposited over said substrate; etching said triple layer so that only a part thereof covering said gate electrode only remains to form an active pattern; depositing a transparent conductive layer over said substrate to form a drain and source electrode parts by etching said transparent conductive layer so that two parts of said transparent conductive layer remain facing each other with a space between them and overlapping said gate electrode; depositing a negative photoresist over said substrate; exposing said negative photoresist to a light supplied from the back of said transparent substrate opposite said gate and developing the thus-exposed negative photoresist; forming a drain and source electrodes by removing the parts of said transparent conductive layer appearing in a region over said gate from which said photoresist is removed; and removing a portion of said extrinsic semiconductor layer exposed over said gate electrode so as to form a channel. - View Dependent Claims (9)
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10. A process for fabricating a self-aligned thin-film transistor comprising the steps of:
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depositing a conductive layer on a transparent insulating substrate; etching said conductive layer so as to form a gate electrode together with gate lines; forming a triple layer consisting of a gate insulating layer, a semiconductor layer and an extrinsic semiconductor layer sequentially deposited over said substrate; etching said triple layer so that only a part thereof covering said gate electrode only remains to form an active pattern; etching the gate insulating layer of a connecting pad for connecting a drive integrated circuit with a liquid crystal substrate; depositing a transparent conductive layer over said substrate to form a drain electrode part by etching said transparent conductive layer so that a part of said transparent conductive layer remains overlapping said gate electrode and a part of said transparent conductive layer over said connecting pad is not etched; depositing a negative photoresist over said substrate; exposing said negative photoresist to a light supplied from the back of said transparent substrate opposite said gate and developing the thus-exposed negative photoresist; forming a drain electrode by removing the part of said transparent conductive layer appearing in a region over said gate from which said photoresist is removed; depositing a conductive layer over said substrate to form a source electrode together with data lines by etching said conductive layer so that there remains a portion of said conductive layer opposite to said drain electrode with respect to said gate electrode; and removing a portion of said extrinsic semiconductor layer exposed over said gate electrode so as to form a channel.
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Specification