Voltage controlled ring oscillator

• US 5,675,293 A
• Filed: 01/04/1996
• Issued: 10/07/1997
• Est. Priority Date: 11/02/1995
• Status: Expired due to Fees

• Current Assignee: Electronics and Telecommunications Research Institute, Korea Telecommunication Authority
• Original Assignee: Electronics and Telecommunications Research Institute, Korea Telecommunication Authority
• Inventors: Kim, Jae Young, Lee, Bhum Cheol, Choi, Eun Chang, Park, Kwon Chul
• Primary Examiner(s): Grimm, Siegfried H.
• Application Number:
  US08/582,882
• Time in Patent Office: 642 Days
• Field of Search: 331/57, 331/135, 331/177 R, 331/DIG. 3
• US Class Current: 331/57
• CPC Class Codes: H03K 3/0315 Ring oscillators
• CPC Class Codes: Y10S 331/03 Logic gate active element oscillator

Abstract

A voltage controlled ring oscillator having a reduced voltage controlled oscillator (VCO) gain by controlling only the fall time of the period of the VCO using integrated circuits and logic circuits. The VCO includes a mixer/inverter circuit, a logic circuit, a delay/inverter circuit, a first delay circuit, a second delay circuit, and a third delay circuit. The VCO gain is reduced by controlling only one pulse width of the logic level High and one pulse width of the logic level Low of the oscillating period. Furthermore, the VCO can be logically controlled by using a simple logic circuit as a component of the VCO.

Claims

1. A voltage controlled ring oscillator comprising:

a mixer/inverter means having an output terminal at which the mixed result of the voltage of a first input terminal with the voltage of a second input terminal according to the voltage Vc of a control voltage input terminal is supplied;

a logic circuit means having an input to which is supplied the output of said mixer/inverter means, and an output having a Low(High) level transition when either input of two inputs has a High(Low) level transition firstly, and having a High(Low) level transition when either input of two inputs has a Low(High) level transition secondly;

a delay/inverter means having an input connected to the output of said logic circuit means, and an output which is supplied with a delayed and inverted output of said logic circuit means;

a first delay means having an input connected to the output of said logic circuit means, and an output which is supplied with said delayed output of said logic circuit means to another input terminal of said logic circuit means;

a second delay means having an input connected to the output of said delay/inverter means, and an output which is supplied with the output of said delay/inverter means with or without a delay and which is connected to said first input terminal of said mixer/inverter means; and

a third delay means having an input connected to the output of said delay/inverter means, and an output which is supplied with the delayed output of said delay/inverter means and which is connected to said second input terminal of said mixer/inverter means.

2. A voltage controlled ring oscillator as claimed in claim 1, wherein said logic circuit means is a NOR gate having two inputs.

3. A voltage controlled ring oscillator as claimed in claim 1, wherein the waveform at said output of said logic circuit means has a period determined by the delay time of said first delay means+the delay time of said delay/inverter means+(a variable C dependant on control voltage Vc×

the delay time of said third delay means)+{(1-the variable C dependant on control voltage Vc)×

the delay time of said second delay means}.

4. A voltage controlled ring oscillator comprising:

a mixer/inverter circuit having a first input, a second input, a control voltage input, and an output, wherein the output is a mixture of the first input and the second input according to the control voltage input;

a logic circuit having a first input, a second input coupled to the output of the mixer/inverter circuit, and an output, wherein the output of the logic circuit has a level transition related to when the first input of the logic circuit or the second input of the logic circuit has another level transition;

a delay/inverter circuit having an input coupled to the output of the logic circuit and an output;

a first delay circuit having an input coupled to the output of the logic circuit and an output coupled to the first input of the logic circuit;

a second delay circuit having an input coupled to the output of the delay/inverter circuit and an output coupled to the first input of the mixer/inverter circuit; and

a third delay circuit having an input coupled to the output of the delay/inverter circuit and an output coupled to the second input of the mixer/inverter circuit.

5. A voltage controlled ring oscillator as in claim 4, wherein the output of the logic circuit has a Low (High) level transition after either the first input of the logic circuit or the second input of the logic circuit has a High (Low) level transition firstly, and wherein the output of the logic circuit has a High (Low) level transition after either the first input of the logic circuit or the second input of the logic circuit has a Low (High) level transition secondly.

6. A voltage controlled ring oscillator as in claim 4, wherein the output of the delay/inverter circuit is a delayed and inverted version of the input of the delay/inverter circuit.

7. A voltage controlled ring oscillator as in claim 4, wherein the input of the second delay circuit is either delayed or not delayed to the output of the second delay circuit.

8. A voltage controlled ring oscillator as in claim 4, wherein the logic circuit includes a NOR gate having two inputs.

9. A voltage controlled ring oscillator as in claim 4, wherein the first delay circuit has a first delay d₁, the second delay circuit has a second delay d₂, the third delay circuit has a third delay d₃, the delay/inverter circuit has a fourth delay d₄, and the output of the logic circuit produces a waveform having a period equal to d₁ +d₄ +(Cd₃)+{(1-C)d₂ }, where C is a variable dependent on the control voltage input of the mixer/inverter circuit.

10. A voltage controlled ring oscillator as in claim 4, wherein the first input of the mixer/inverter circuit has a first time t dependent voltage Vy(t), the second input of the mixer/inverter circuit has a second time t dependent voltage Vx(t), the mixer/inverter circuit has a delay D, and the output of the mixer/inverter circuit produces a voltage Vz equal to 1-{(1-C)Vy(t-D)+CVx(t-D)}, where C is a variable dependent on the control voltage input of the mixer/inverter circuit.

11. A method for controlling a logic output voltage of a voltage controlled ring oscillator comprising the steps of:

mixing a first mixer/inverter input voltage and a second mixer/inverter input voltage according to a control input voltage to produce a mixer/inverter output voltage;

combining logically a first logic input voltage and the mixer/inverter output voltage to produce the logic output voltage;

delaying the logic output voltage to produce the first logic input voltage;

delaying and inverting the logic output voltage to produce a delay/inverter output voltage;

delaying the delay/inverter output voltage to produce the first mixer/inverter input voltage; and

delaying the delay/inverter output voltage to produce the second mixer/inverter input voltage.

12. A method for controlling a logic output voltage of a voltage controlled ring oscillator as in claim 11, wherein the logic output voltage has a Low (High) level transition after either the first logic input voltage or the mixer/inverter output voltage has a High (Low) level transition firstly, and wherein the logic output voltage has a High (Low) level transition after either the first logic input voltage or the mixer/inverter output voltage has a Low (High) level transition secondly.

13. A method for controlling a logic output voltage of a voltage controlled ring oscillator as in claim 11, wherein the delay/inverter output voltage is a delayed and inverted version of the logic output voltage.

14. A method for controlling a logic output voltage of a voltage controlled ring oscillator as in claim 11, wherein the delay/inverter output voltage is either delayed or not delayed in producing the first mixer/inverter input voltage.

15. A method for controlling a logic output voltage of a voltage controlled ring oscillator as in claim 11, wherein the step of combining includes a NOR logic function.

16. A method for controlling a logic output voltage of a voltage controlled ring oscillator as in claim 11, wherein:

delaying the logic output voltage to produce the first logic input voltage has a first delay d₁ ;

delaying the delay/inverter output voltage to produce the first mixer/inverter input voltage has a second delay d₂ ;

delaying the delay/inverter output voltage to produce the second mixer/inverter input voltage has a third delay d₃ ;

delaying and inverting the logic output voltage to produce the delay/inverter output voltage has a fourth delay d₄ ; and

the logic output voltage has a period equal to d₁ +d₄ +(Cd₃)+{(1-C)d₂ }, where C is a variable dependent on the control input voltage.

17. A method for controlling a logic output voltage of a voltage controlled ring oscillator as in claim 11, wherein the first mixer/inverter input voltage has a first time t dependent voltage Vy(t), the second mixer/inverter input voltage has a second time t dependent voltage Vx(t), the step of mixing has a delay D, and the mixer/inverter output voltage has a voltage Vz equal to 1-{(1-C)Vy(t-D)+CVx(t-D)}, where C is a variable dependent on the control input voltage.