×

Cache memory system and method for selectively removing stale aliased entries

  • US 5,675,763 A
  • Filed: 08/04/1995
  • Issued: 10/07/1997
  • Est. Priority Date: 07/15/1992
  • Status: Expired due to Term
First Claim
Patent Images

1. A cache memory system comprising:

  • a processor;

    a cache, said cache comprising a plurality of entries, each entry of said cache comprising a tag field connected to said processor by at least one virtual address line and a data field, each entry of said cache further comprising a status field containing at least one bit for indicating possible membership of the corresponding entry in a class of entries requiring selective flushing from said cache, said class of entries comprising entries which are potential aliases;

    said processor including means, coupled to the status field of each of the cache entries, for setting the at least one bit of the status field of a cache entry to indicate membership of that entry in said cache in the class of entries requiring selective flushing from said cache, said means for setting further comprising;

    a translation look-aside buffer, said translation look-aside buffer comprising a plurality of entries corresponding to said plurality of entries of said cache, each entry of said translation lookaside buffer comprising a status field containing an appropriate value of the at least one bit of the status field of a corresponding cache entry; and

    fill means for loading the at least one bit of the status field of a cache entry with said status value from a corresponding location in said translation lookaside buffer as said cache entry is written to said cache; and

    said cache memory system further comprising means, connected to said cache, for selectively flushing an entry in said cache having the at least one bit of its status field set to indicate membership of that entry in the class of entries that are potential aliases.

View all claims
  • 2 Assignments
Timeline View
Assignment View
    ×
    ×