High-swing cascode current mirror
First Claim
1. A high-swing current mirror comprising:
- a cascode current source having first andsecond bias terminals and an output terminal;
a bias circuit comprising;
a transistor M1 having a gate, source and drain, with the drain being coupled to the gate;
a transistor M2A having a gate and source coupled to the gate and source, respectively, of the transistor M1 and having a drain;
a transistor M2B having a gate and drain coupled to one another and to the second bias terminal and having a source coupled to the drain of the transistor M2A; and
a transistor M3A having a gate and drain coupled to the first bias terminal and a source coupled to the sources of the transistors M1 and M2A.
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Accused Products
Abstract
A high-swing current mirror includes a cascode current source and a current source bias circuit. The current source includes first and second bias terminals and an output terminal. The bias circuit includes transistors M1, M2A, M2B and M3A. Transistor M1 has a gate, source, and drain, with the gate coupled to the drain. Transistor M2A has a gate, source, and drain, with the gate and source of transistor M2A coupled to the gate and source, respectively, of transistor M1. Transistor M2B has a gate and drain coupled to one another and to the second bias terminal and a source coupled to the drain of transistor M2A. Transistor M3A has a gate and drain coupled together and to the first bias terminal and a source coupled to the sources of transistors M1 and M2A. The transistors in the cascode current source and current source bias circuit have ratios of device transconductance parameters such that the cascode current source remains in saturation to provide the highest possible voltage swing at the output terminal.
63 Citations
14 Claims
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1. A high-swing current mirror comprising:
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a cascode current source having first and second bias terminals and an output terminal; a bias circuit comprising; a transistor M1 having a gate, source and drain, with the drain being coupled to the gate; a transistor M2A having a gate and source coupled to the gate and source, respectively, of the transistor M1 and having a drain; a transistor M2B having a gate and drain coupled to one another and to the second bias terminal and having a source coupled to the drain of the transistor M2A; and a transistor M3A having a gate and drain coupled to the first bias terminal and a source coupled to the sources of the transistors M1 and M2A. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13)
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14. An integrated circuit comprising:
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a cascode current source having first and second bias terminals and an output terminal; a current source bias circuit comprising; a first bias circuit portion comprising a first transistor having a gate, a source and a drain, with the gate and drain being coupled to the first bias terminal; and a second bias circuit portion comprising; a second transistor having a gate, source and drain, with the gate and drain being coupled together and the source coupled to the source of the first transistor; a third transistor having a gate coupled to the gate of the second transistor, a source coupled to the source of the second transistor and a drain; and a fourth transistor having a gate and a drain coupled to the second bias terminal and a source coupled to the drain of the third transistor.
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Specification