Programmable analog array and method for configuring the same
First Claim
1. A programmable analog array, comprising:
- an array of cells, wherein a first cell in the array of cells includes analog circuitry which is configurable to realize a plurality of circuit functions, and a switch control circuit which periodically configures the analog circuitry to realize a first circuit function of the plurality of circuit functions and reconfigures the analog circuitry to realize a second circuit function of the plurality of circuit functions;
an interconnection network coupled to the array of cells, wherein the interconnection network allows an interconnection of the first cell in the array of cells with a second cell in the array of cells; and
an access circuit which selectively accesses the first cell in the array of cells, transmits cell configuration data for the first circuit function and the second circuit function to the first cell, and transmits interconnection data to the interconnection network.
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Accused Products
Abstract
A programmable analog array (10) comprises an array (11) of cells, each cell including analog circuitry (12), a switch control circuit (18), and a digital storage element (16). The switch control circuit (18) receives a clock signal and sequentially configures the circuits within the analog circuitry (12) to realize different circuit functions in accordance with configuration data stored in different digital memory units (17A-17D) within digital storage element (16). During a time interval, the analog signals generated by the analog circuitry (12) before that time interval are stored in an analog storage element (14), which is constructed from a portion of a capacitor network (54) in the analog circuitry (12) and is partitioned into a set of analog memory units (56A-56D). Each analog memory unit (56A-56D) stores the analog signal for a corresponding phase of the clock signal.
115 Citations
20 Claims
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1. A programmable analog array, comprising:
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an array of cells, wherein a first cell in the array of cells includes analog circuitry which is configurable to realize a plurality of circuit functions, and a switch control circuit which periodically configures the analog circuitry to realize a first circuit function of the plurality of circuit functions and reconfigures the analog circuitry to realize a second circuit function of the plurality of circuit functions; an interconnection network coupled to the array of cells, wherein the interconnection network allows an interconnection of the first cell in the array of cells with a second cell in the array of cells; and an access circuit which selectively accesses the first cell in the array of cells, transmits cell configuration data for the first circuit function and the second circuit function to the first cell, and transmits interconnection data to the interconnection network. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A programmable analog array, comprising:
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an array of cells, wherein a first cell in the array of cells includes; analog circuitry; a digital storage element which stores cell configuration data for a plurality of circuit functions; a switch control circuit which periodically and sequentially configures the analog circuitry to realize each circuit function of the plurality of circuit functions in accordance with the cell configuration data stored in the digital storage element; and an analog storage element which stores an analog signal generated by the analog circuitry; an interconnection network coupled to the array of cells, wherein the interconnection network allows an interconnection of the first cell in the array of cells with a second cell in the array of cells; and an access circuit which selectively accesses the first cell in the array of cells, transmits the cell configuration data to the first cell, and transmits interconnection data to the interconnection network. - View Dependent Claims (11, 12, 13, 14)
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15. A method for configuring a programmable analog array, comprising the steps of:
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storing cell configuration data for a plurality of circuit functions in a digital storage element of a first cell in the programmable analog array; transmitting a clock signal to the first cell; configuring analog circuitry in the first cell to realize a first circuit function of the plurality of circuit functions for a first time interval; and configuring the analog circuitry in the first cell to realize a second circuit function of the plurality of circuit functions for a second time interval. - View Dependent Claims (16, 17, 18, 19, 20)
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Specification