Bonding option circuit having no pass-through current

• US 5,682,105 A
• Filed: 11/29/1995
• Issued: 10/28/1997
• Est. Priority Date: 11/29/1994
• Status: Expired due to Fees

• Current Assignee: NEC Electronics Corporation (Renesas Electronics Corporation)
• Original Assignee: NEC Corporation
• Inventors: Fujima, Shiro
• Primary Examiner(s): Westin, Edward P.
• Assistant Examiner(s): Santamauro, Jon
• Application Number:
  US08/564,450
• Time in Patent Office: 699 Days
• Field of Search: 326/38, 326/30, 326/83, 326/86-87, 326/23-24, 326/62, 326/68, 327/198, 327/313, 327/333, 327/391
• US Class Current: 326/30
• CPC Class Codes: H01L 24/06 of a plurality of bonding areas
• CPC Class Codes: H01L 2924/01015 Phosphorus [P]
• CPC Class Codes: H01L 2924/01023 Vanadium [V]
• CPC Class Codes: H01L 2924/01033 Arsenic [As]
• CPC Class Codes: H01L 2924/01082 Lead [Pb]
• CPC Class Codes: H01L 2924/14 Integrated circuits
• CPC Class Codes: H01L 2924/19041 being a capacitor
• CPC Class Codes: H03K 19/0016 by using a control or a clock signal, e.g. in order to apply power supply

Abstract

A bonding option circuit comprises a logic gate circuit connected between a bonding pad and a power supply voltage, a load capacitance connected between ground and the logic gate circuit, and an output stabilizer circuit having an input connected to the bonding pad and an output connected to an output terminal. The logic circuit is so configured that when the bonding pad is in a floating condition, the logic circuit connects the bonding pad to the power supply voltage, and when the bonding pad is bonded to the ground, the logic circuit disconnects a current path between the bonding pad and the power supply voltage.

Claims

1. A bonding option circuit comprising a bonding pad, a logic gate circuit connected between said bonding pad and one of a power supply voltage and ground, a load capacitance connected between said ground and said logic gate circuit, and an output stabilizer circuit having an input connected to said bonding pad and an output connected to an output terminal, said logic circuit being so configured that when said bonding pad is in a floating condition, said logic circuit connects said bonding pad to said one of said power supply voltage and said ground, and when said bonding pad is bonded to the other of said power supply voltage and said ground, said logic circuit disconnects a current path between said bonding pad and said one of said power supply voltage and said ground;

wherein said logic circuit includes a P-channel transistor connected between said bonding pad and said power supply voltage, a first N-channel transistor connected between said bonding pad and said power supply voltage, a first inverter having an input connected to said bonding pad and an output connected to a gate of said P-channel transistor, a second inverter having an input connected to said output of said first inverter and an output connected to a gate of said first N-channel transistor, and a second N-channel transistor connected between said output of said first inverter and said ground and having a gate connected to said bonding pad, said load capacitance being connected between said gate of said P-channel transistor and said ground.

2. A bonding option circuit comprising a bonding pad, a logic gate circuit connected between said bonding pad and one of a power supply voltage and ground, a load capacitance connected between said ground and said logic gate circuit, and an output stabilizer circuit having an input connected to said bonding pad and an output connected to an output terminal, said logic circuit being so configured that when said bonding pad is in a floating condition, said logic circuit connects said bonding pad to said one of said power supply voltage and said ground, and when said bonding pad is bonded to the other of said power supply voltage and said ground, said logic circuit disconnects a current path between said bonding pad and said one of said power supply voltage and said ground;

wherein said logic circuit includes a P-channel transistor connected between said bonding pad and said power supply voltage, an N-channel transistor, an inverter having an input connected to said bonding pad and an output connected to a gate of said P-channel transistor, a gate of said N-channel transistor being controlled by said output of said inverter;

wherein said load capacitance is connected between said ground and said gate of said P-channel transistor, and said N-channel transistor is connected between said bonding pad and said power supply voltage, and wherein said output of said inverter is connected to an input of a second inverter having an output connected to said gate of said N-channel transistor, and a second N-channel transistor is connected between said input of said second inverter and said ground, a gate of said second N-channel transistor being connected to said bonding pad.