Electronic control system/network
DCFirst Claim
1. An identification and location network system comprising two or more nodes, with at least one programmable, location marking and processing, movable tag node, and at least one programmable fixed position node (FPN) for communication with the tag node, for the location, identification and monitoring of said tag node relative to the FPN;
- said nodes each comprising an integrated circuit with programmable microprocessor means, a unique identification number, transceiver means for receiving and sending information, and memory storage means, and wherein each node further comprises means for direct inter-node communication and means for decision making capable of making decisions by itself, which do not require a central system processor for operation;
the tag node further comprising an integral power source and means for communication with an FPN or other tag node with or without interrogation; and
said FPN'"'"'s and tag nodes comprising interface means for interfacing with human or object input and output, wherein said integrated circuit comprises at least three independent microprocessors which share common memory means and control circuitry but with separate sets of registers, wherein a first microprocessor comprises a communication CPU adapted to provide media access control and communication between the nodes and includes linkage to the transceiver means for receiving and transmitting information.
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Abstract
A network system of programmable, identification, locating, monitoring and processing fixed position (FPN) and movable tag nodes, which provides direct inter-node communication capability without a central processor. The individual nodes include microprocessor elements, pre-programmed to recognize external environmental conditions and to logically act on the basis of recognized condition parameters, and where appropriate, to communicate with other nodes for network action. Each node comprises an IC having three independent processors which share a common memory and control circuitry but with separate sets of registers. A first processor (CPU) provides media access control and communication between the nodes and includes transceiver elements for receiving and transmitting information. A second processor is the application CPU which runs code written for the particular use, as well as the overall operating system, which is provided with direct linkage to interfacing input and output, and the like, for initial processing based on environmental conditions, as preprogrammed. The third processor, a network CPU, links the applications CPU with the communication CPU, and handles network variable processing, addressing, transaction processing, authentication, network management, etc. The nodes provide an independently operable overall network, in a defined area of operation, capable of location identification, logical control of preprogrammed environmental conditions and logical interaction with external inquiries for transactional operations.
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Citations
43 Claims
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1. An identification and location network system comprising two or more nodes, with at least one programmable, location marking and processing, movable tag node, and at least one programmable fixed position node (FPN) for communication with the tag node, for the location, identification and monitoring of said tag node relative to the FPN;
- said nodes each comprising an integrated circuit with programmable microprocessor means, a unique identification number, transceiver means for receiving and sending information, and memory storage means, and wherein each node further comprises means for direct inter-node communication and means for decision making capable of making decisions by itself, which do not require a central system processor for operation;
the tag node further comprising an integral power source and means for communication with an FPN or other tag node with or without interrogation; and
said FPN'"'"'s and tag nodes comprising interface means for interfacing with human or object input and output, wherein said integrated circuit comprises at least three independent microprocessors which share common memory means and control circuitry but with separate sets of registers, wherein a first microprocessor comprises a communication CPU adapted to provide media access control and communication between the nodes and includes linkage to the transceiver means for receiving and transmitting information. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43)
- said nodes each comprising an integrated circuit with programmable microprocessor means, a unique identification number, transceiver means for receiving and sending information, and memory storage means, and wherein each node further comprises means for direct inter-node communication and means for decision making capable of making decisions by itself, which do not require a central system processor for operation;
Specification