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Optimization processing for integrated circuit physical design automation system using chaotic fitness improvement method

  • US 5,682,322 A
  • Filed: 04/19/1994
  • Issued: 10/28/1997
  • Est. Priority Date: 04/19/1994
  • Status: Expired due to Term
First Claim
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1. A method of relocating a cell in a cell placement for an integrated circuit chip, comprising the step of:

  • (a) computing a centroid as a first predetermined function of relationships between said cell and other associated cells on the chip;

    (b) computing a first length from a current location of said cell to said centroid;

    (c) computing a second length as a second predetermined function of said first length; and

    (d) moving said cell from said current location toward said centroid by said second length.

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