Process for producing surface micromechanical structures

• US 5,683,591 A
• Filed: 11/27/1995
• Issued: 11/04/1997
• Est. Priority Date: 05/25/1993
• Status: Expired due to Term

• Current Assignee: Robert Bosch GmbH
• Original Assignee: Robert Bosch GmbH
• Inventors: Offenberg, Michael
• Primary Examiner(s): POWELL, WILLIAM A
• Application Number:
  US08/553,571
• Time in Patent Office: 708 Days
• Field of Search: 156/626.1, 156/628.1, 156/643.1, 156/646.1, 156/653.1, 156/657.1, 216/2, 216/58, 216/59, 216/62, 216/79, 437/228 H, 437/927
• US Class Current: 216/2
• CPC Class Codes: B81C 1/0092 For avoiding stiction during the manufacturing process of the device, e.g. during wet etching
• CPC Class Codes: B81C 1/00936 Releasing the movable structure without liquid etchant
• CPC Class Codes: B81C 2201/0132 Dry etching, i.e. plasma etching, barrel etching, reactive ion etching [RIE], sputter etching or ion milling
• CPC Class Codes: G01P 15/0802 Details

Abstract

A method for fabricating surface-micromechanical structures wherein a sacrificial layer, in particular of silicon oxide, is deposited on a silicon substrate represented by a silicon wafer, the sacrificial layer being patterned. Onto the sacrificial layer, a second layer, in particular of polysilicon, is deposited and is likewise patterned. The sacrificial layer is removed in an etching operation by means of an etching medium which attacks the sacrificial layer but not the second layer, structures being formed as a result of which are free-standing above the silicon substrate at a distance equal to the thickness of the removed sacrificial layer and are anchored at certain sites on the silicon substrate. According to the invention, for the purpose of etching and exposing, the micromechanical structures are exposed to the vapor phase of a mixture of anhydrous hydrofluoric acid and water in a vapor-phase etching process. This makes it possible to dispense with laborious rinsing operations and sublimation operations.

Claims

1. A method for fabricating, on a silicon wafer, at least one micromechanical structure which is at least partially free-standing above a silicon substrate at a distance that is approximately equal to a thickness of a sacrificial layer and is at least partially mounted to the silicon substrate, comprising the steps of:

(a) depositing the sacrificial layer on the silicon substrate;

(b) depositing a second layer on the sacrificial layer, the second layer being patterned;

(c) performing a vapor-phase etching process including the steps of removing, in an etching operation, the sacrificial layer without removing the second layer by subjecting the silicon wafer to a vapor phase of a mixture, of hydrofluoric acid and water to expose the micromechanical structure, and heating the silicon wafer to adjust an etching rate by controlling the water content on a surface of the silicon wafer.

2. The method according to claim 11, wherein the silicon wafer is arranged above a vessel which contains an azeotropic hydrofluoric acid solution, of approximately 38.26%, and the surface of the silicon wafer containing the sacrificial layer and second layer faces an interior of the vessel.

3. The method according to claim 1, wherein the vapor-phase etching process further includes the step of preventing condensation by pumping.

4. The method according to claim 1, wherein the second layer includes polysilicon and the sacrificial layer includes undoped silicon oxide, and wherein the sacrificial layer is removed without subsequent rinsing and drying.

5. The method as claimed in claim 4, further comprising the steps of covering at least one additional electronic circuit disposed on the silicon wafer with a protective film prior to performing the vapor-phase etching process, and removing the protective film after the vapor-phase etching process is completed.

6. The method according to claim 4, further comprising the steps of:

producing stiffeners of photoresist as bridges between the micromechanical structure and the silicon substrate prior to performing the vapor-phase etching process;

exposing the micromechanical structure by removing the sacrificial layer during the vapor-phase etching process, the micromechanical structure being stabilized by the stiffeners;

removing the stiffeners using oxygen plasma after the vapor-phase etching process is completed.

7. The method according to claim 4, further comprising the steps of:

producing stiffeners of a material which etches slowly and without leaving any residues in the vapor phase and is compatible with LPCVD depositions as bridges between the micromechanical structure and the silicon substrate prior to performing the vapor-phase etching process;

disposing a layer as an enclosure having a plurality of etching orifices prior to performing the vapor-phase etching process;

performing the vapor-phase etching process such that the stiffeners are attacked only in part while the sacrificial layer is dissolved, by performing a second etching step to remove the stiffeners;

depositing a second layer closing the enclosure;

cutting the wafer.

8. The method according to claim 7, wherein the stiffeners include a thin polysilicon layer whose etching selectivity with respect to the sacrificial layer of silicon oxide is adjusted systematically by oxygen implantation.

9. The method according to claim 4, further comprising the step of cutting the silicon wafer into individual chips prior to performing the vapor-phase etching process, and performing the vapor-phase etching process on each of the individual chips.

10. The method according to claim 4, further comprising the steps of:

disposing a test structure in the form of a capacitor including the second layer as one capacitor plate, the silicon substrate as a second capacitor plate, and the sacrificial layer as a dielectric situated between the second layer and the silicon substrate, and having a first contact tip contacting the second layer and having a second contact tip contacting the silicon substrate;

monitoring the capacitance of the test structure during the vapor-phase etching process for variation caused by replacing the sacrificial layer with air.

11. The method according to claim 10, further comprising the step of monitoring the capacitance for a short-circuit or abrupt increase in capacitance signal, indicating an end of the etching process, caused by compressing the test structure due to dissolvement of the sacrificial layer.

12. The method according to claim 1, wherein the second layer includes polysilicon, and the sacrificial layer includes doped silicon oxide, and further comprising the steps of producing a plurality of stiffeners including a slow-etching material including polysilicon with implanted oxygen as bridges between the micromechanical structures to be produced and the silicon substrate prior to performing an etching process, performing a first etching step in a liquid phase of an etching medium where the sacrificial layer is removed completely and the plurality of stiffeners being dissolved only in part and continuing to perform a stiffening function, rinsing and drying the silicon wafer by spinning, and performing a second etching step using the vapor-phase etching process to remove the plurality of stiffeners.