Liquid crystal display with storage capacitors for holding electric charges

• US 5,686,976 A
• Filed: 08/17/1995
• Issued: 11/11/1997
• Est. Priority Date: 11/11/1994
• Status: Expired due to Term

• Current Assignee: Sanyo Electric Company Limited (Panasonic Holdings Corporation)
• Original Assignee: Sanyo Electric Company Limited (Panasonic Holdings Corporation)
• Inventors: Nishikawa, Ryuji
• Primary Examiner(s): Sikes, William L.
• Assistant Examiner(s): TON, MINH TOAN T
• Application Number:
  US08/516,098
• Time in Patent Office: 817 Days
• Field of Search: 359/59, 359/87, 359/88, 359/57, 349/42, 349/38, 349/39, 349/139, 349/148
• US Class Current: 349/38
• CPC Class Codes: G02F 1/136213 Storage capacitors associated with the pixel electrode

Abstract

An active matrix type liquid crystal display comprises pixel electrodes corresponding to respective pixels and storage capacitor electrodes which are disposed lying adjacent to each pixel electrode, with an insulation layer interposed therebetween. Input terminal electrodes are positioned at ends of a TFT substrate. An input capacitor is constituted by one storage capacitor electrode and one input terminal electrode which are positioned at opposite sides of the insulating layer interposed therebetween. Input capacitors are connected in series with the storage capacitor. A voltage of the storage capacitor electrode is controllable in response to a signal to the input terminal electrode as desired. The storage capacitor electrode and input terminal electrode can be shorted by irradiating a laser. In either case, it is not necessary to make a contact hole on an insulation layer using a dedicated mask so as to connect the input terminal electrode and storage capacitor electrode to the insulation layer. Thus, it is possible to reduce the number of masks to be used during the manufacturing process.

Claims

1. A liquid crystal display with storage capacitors for holding charges, comprising:

(a) a plurality of pixel electrodes arranged, on a substrate, in matrix array;

(b) drain lines formed between columns of the pixel electrodes;

(c) gate lines formed between rows of the pixel electrodes;

(d) thin film transistors formed near intersections of the drain lines and the gate lines, each thin film transistor including a source electrode connected to each pixel electrode, a drain electrode connected to each drain line, and a gate electrode connected to each gate line;

(e) storage capacitor electrodes disposed lying adjacent to the pixel electrodes with an insulation layer sandwiched therebetween;

(f) storage capacitors constituted by the pixel electrodes and the storage capacitor electrodes;

(g) an input terminal electrode for the storage capacitors disposed at an end of the substrate;

(h) storage capacitor lines connected to the storage capacitor electrodes and extending to an end of the substrate to connect to a common capacitor electrode; and

(i) an input capacitor formed by the common capacitor electrode and the input terminal electrode opposing the common capacitor electrode through the insulation layer interposed in between the common capacitor electrode and the input terminal electrode, wherein voltages applied to the storage capacitor electrodes are controlled by signals supplied to the input terminal electrode via the input capacitor.

2. The liquid crystal display as in claim 1, wherein

each of the gate lines carries the insulation layer and the semiconductor layer on its underside,

each source electrode is constituted by a part of each pixel electrode,

each drain electrode is constituted by a part of each drain line,

a channel layer which is a part of the semiconductor layer and is positioned at an area where the source electrode and the drain electrode lie adjacent to each other,

a gate insulation layer which is a part of the insulation layer and extends over the channel layer, and

each gate which is a part of the gate line and extends over the gate insulation layer.

3. The liquid crystal display as in claim 2, wherein the input terminal electrode is made of the same transparent conductive layer constituting the pixel electrodes and the drain lines.

4. The liquid crystal display as in claim 1, wherein the input terminal electrode is disposed at a corner or a side of the substrate, or both a corner and a side of the substrate.

5. The liquid crystal display as in claim 1, wherein each storage capacitor electrode is disposed lying adjacent to each pixel electrode with the insulation layer interposed therebetween around the pixel electrode, and storage capacitor electrodes which are on the same rows and columns of pixel electrodes adjoining each other are mutually connected.

6. The liquid crystal display as in claim 5, wherein the storage capacitor electrode is constituted by a part of a light shielding layer on the substrate.

7. The liquid crystal display as in claim 1, wherein the storage capacitor electrodes are made of a transparent conductive layer extending all over the substrate.

8. The liquid crystal display as in claim 1, wherein an input capacitor has a capacitance which is 1/10 of the total capacitance of all the storage capacitors on the substrate.

9. A liquid crystal display with storage capacitors for holding charges, comprising:

a plurality of pixel electrodes arranged, on a substrate, in matrix array;

drain lines formed between columns of the pixel electrodes;

gate lines formed between rows of the pixel electrodes;

thin film transistors formed near intersections of the drain lines and the gate lines, each thin film transistor including a source electrode connected to each pixel electrode, a drain electrode connected to each drain line, and a gate electrode connected to each gate line;

storage capacitor electrodes disposed lying adjacent to the pixel electrodes with an insulation layer sandwiched therebetween;

storage capacitors constituted by the pixel electrodes and the storage capacitor electrodes;

an input terminal electrode for the storage capacitors disposed at an end of the substrate; and

an input capacitor constituted by the storage capacitor electrode and the input terminal electrode, and having a capacitance which is 1/10 of the total capacitance of all the storage capacitors on the substrate,

wherein the storage capacitor electrodes extend to an end of the substrate such that the storage capacitor electrode is disposed lying adjacent to the input terminal electrodes with the insulation layer interposed therebetween, and voltages applied to the storage capacitor electrodes are controlled by signals supplied to the input terminal electrodes.

10. The liquid crystal display as in claim 9, wherein each storage capacitor electrode is provided for each pixel electrode, each storage capacitor electrode is connected to a common capacitor electrode present at the one end of the substrate, and the input capacitor is constituted by the common capacitor electrode and the input terminal electrode which is formed on the common capacitor electrode via the insulation layer.

11. A liquid crystal display with storage capacitors for retaining charges, comprising:

(a) a plurality of pixel electrodes arranged, on a substrate, in matrix array;

(b) drain lines formed between columns of the pixel electrodes;

(c) gate lines formed between rows of the pixel electrodes;

(d) thin film transistors formed near intersections of the drain lines and the gate lines, each thin film transistor including a source electrode connected to the pixel electrode, a drain electrode connected to the drain line, and a gate electrode connected to the gate line;

(e) storage capacitor electrode disposed lying adjacent to the pixel electrodes with an insulation layer sandwiched therebetween;

(f) storage capacitors constituted by the pixel electrodes and the storage capacitor electrode;

(g) an input terminal electrode for the storage capacitors disposed at an end of the substrate;

(h) an input capacitor formed by the storage capacitor electrode extending to an end of the substrate and the input terminal electrode opposing the storage capacitor electrode through the insulation layer interposed in between the storage capacitor electrode and the input terminal electrode; and

(i) a resistance formed by shorting the input terminal electrode and the storage capacitor electrode, wherein voltages applied to the storage capacitor electrode are controlled by signals supplied to the input terminal electrode via the input capacitor and the resistance.

12. The liquid crystal display as in claim 11, wherein the input terminal electrode and the storage capacitor electrode are shorted by a laser irradiated from a side of the input terminal electrode or the storage capacitor electrode after formation of the foregoing electrodes and the insulation layer such that the resistance is added in parallel to the input capacitor.

13. The liquid crystal display as in claim 12, wherein each gate line carries the insulation layer and a semiconductor layer on its underside;

each source electrode is constituted by a part of each pixel electrode;

each drain electrode is constituted by a part of each drain line;

a channel layer which is a part of the semiconductor layer and is positioned at an area where the source electrode and the drain electrode lie adjacent to each other; and

a gate insulation layer which is a part of the insulation layer and extends over the channel layer.

14. The liquid crystal display as in claim 13, wherein the storage capacitor electrode is constituted by a transparent conductive layer laid over the substrate.

15. The liquid crystal display as in claim 14, wherein a light shielding layer is formed on the storage capacitor electrode around each pixel electrode, the light shielding layer is connected to the storage capacitor electrode and extends to the end of the substrate where the laminate is present over the input terminal electrode, and the input terminal electrode and the storage capacitor electrode are shorted at an area where the laminate and the light shielding layer are provided.

16. The liquid crystal display as in claim 15, wherein the input terminal electrode and the storage capacitor electrode are shorted by a laser irradiated from a side of the storage capacitor electrode or the laminate such that the resistance is added in parallel to the input capacitor.

17. The liquid crystal display as in claim 12, wherein the resistance is parallel to the input capacitor so that a total impedance of the input capacitor is reduced, thereby increasing the voltages applied to the storage capacitors.

18. The liquid crystal display as in claim 13, wherein a laminate of the semiconductor layer, the insulation layer and the same metal layer as the gate line is laid over the input terminal electrode, and the input terminal electrode and the storage capacitor electrode are shorted within an area of the laminate.

19. The liquid crystal display as in claim 18, wherein the input terminal electrodes and the storage capacitor electrodes are shorted by a laser irradiated from a side of the laminate or from a side of the storage capacitor electrode such that the resistance is added in parallel to the input capacitor.

20. The liquid crystal display as in claim 19, wherein a light shielding layer is formed on the storage capacitor electrode around each pixel electrodes, the light shielding layer is connected to the storage capacitor electrode and extends to the end of the substrate where the laminate is present over the input terminal electrode, and the input terminal electrode and the storage capacitor electrode are shorted where the laminate and the light shielding layer are formed.

21. The liquid crystal display as in claim 20, wherein the shorted portion of the input terminal electrode and the storage capacitor electrode is present within an area in which a sealant is used to bond the substrate and an opposing substrate together with a liquid crystal layer interposed in between the substrate and the opposing substrate, and in which a protection layer covers the sealant.

22. The liquid crystal display as in claim 12, wherein the resistance is parallel to the input capacitor so that a total impedance of the input capacitor is reduced, thereby increasing an amplitude of signal voltages applied to the storage capacitors.

23. A liquid crystal display with storage capacitors for retaining charges, comprising:

a plurality of pixel electrodes arranged, on a substrate, in matrix array;

drain lines formed between columns of the pixel electrodes;

gate lines formed between rows of the pixel electrodes;

thin film transistors formed near intersections of the drain lines and the gate lines, each thin film transistor including a source electrode connected to the pixel electrode, a drain electrode connected to the drain line, and a gate electrode connected to the gate line such that each gate line carries the insulation layer and a semiconductor layer on its underside, each source electrode is constituted by a part of each pixel electrode, each drain electrode is constituted by a part of each drain line, a channel layer is a part of the semiconductor layer and is positioned at an area where the source electrode and the drain electrode lie adjacent to each other and a gate insulation layer is a part of the insulation layer and extends over the channel layer;

storage capacitor electrode disposed lying adjacent to the pixel electrodes with an insulation layer sandwiched therebetween;

storage capacitors constituted by the pixel electrodes and the storage capacitor electrode; and

an input terminal electrode for the storage capacitors disposed at an end of the substrate,

wherein the storage capacitor electrode extend to an end of the substrate where the storage capacitor electrode is disposed adjacent to the input terminal electrode with the insulation layer interposed therebetween, a laminate of the semiconductor layer, the insulation layer and the same metal layer as the gate line is laid over the input terminal electrode, the input terminal electrode and the storage capacitor electrode are shorted within an area of the laminate, and voltages applied to the storage capacitor electrode are controlled by signals supplied to the input terminal electrode.

24. The liquid crystal display as in claim 23, wherein the input terminal electrodes and the storage capacitor electrodes are shorted by a laser irradiated from a side of the laminate or from a side of the storage capacitor electrode.

25. The liquid crystal display as in claim 24, wherein a light shielding layer is formed on the storage capacitor electrode around each pixel electrode, the light shielding layer is connected to the storage capacitor electrode and extends to the end of the substrate where the laminate is present over the input terminal electrode, and the input terminal electrode and the storage capacitor electrode are shorted where the laminate and the light shielding layer are formed.

26. The liquid crystal display as in claim 25, wherein the shorted portion of the input terminal electrode and the storage capacitor electrode is present within an area in which a sealant is used to bond the substrate and an opposing substrate together with a liquid crystal layer interposed in between the substrate and the opposing substrate, and in which a protection layer covers the sealant.

27. A liquid crystal display with storage capacitors for retaining charges, comprising;

a plurality of pixel electrodes arranged, on a substrate, in matrix array;

drain lines formed between columns of the pixel electrodes;

gate lines formed between rows of the pixel electrodes;

thin film transistors formed near intersections of the drain lines and the gate lines, each thin film transistor including a source electrode connected to the pixel electrode, a drain electrode connected to the drain line, and a gate electrode connected to the gate line such that each gate line carries the insulation layer and a semiconductor layer on its underside, each source electrode is constituted by a part of each pixel electrode, each drain electrode is constituted by a part of each drain line, a channel layer is a part of the semiconductor layer and is positioned at an area where the source electrode and the drain electrode lie adjacent to each other and a gate insulation layer is a part of the insulation layer and extends over the Channel layer;

storage capacitor electrode disposed lying adjacent to the pixel electrodes with an insulation layer sandwiched therebetween;

the storage capacitor electrode constituted by a transparent conductive layer laid over the substrate;

storage capacitors constituted by the pixel electrodes and the storage capacitor electrode;

a light shielding layer formed on the storage capacitor electrode around each pixel electrode, the light shielding layer connected to the storage capacitor electrode and extending to the end of the substrate where the laminate is present over the input terminal electrode, and the input terminal electrode and the storage capacitor electrode are shorted at an area where the laminate and the light shielding layer are provided; and

an input terminal electrode for the storage capacitors disposed at an end of the substrate,

wherein the storage capacitor electrode extend to an end of the substrate where the storage capacitor electrode is disposed adjacent to the input terminal electrode with the insulation layer interposed therebetween, and voltages applied to the storage capacitor electrode are controlled by signals supplied to the input terminal electrode.

28. The liquid display as in claim 27, wherein the input terminal electrode and the storage capacitor electrode are shorted by a laser irradiated from a side of the storage capacitor electrode or the laminate.