System for controlling responses to requests over a data bus between a plurality of master controllers and a slave storage controller by inserting control characters

• US 5,687,393 A
• Filed: 06/07/1995
• Issued: 11/11/1997
• Est. Priority Date: 06/07/1995
• Status: Expired due to Fees

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Brown, Lawrence Marcel, Marenin, George Bohoslaw, Yanes, Adalberto Guillermo, Finney, Damon W.
• Primary Examiner(s): Shin, Christopher B.
• Assistant Examiner(s): Chen, Anderson I.
• Application Number:
  US08/480,010
• Time in Patent Office: 888 Days
• Field of Search: 395/200, 395/325, 395/124, 395/800, 395/650, 395/725, 395/275, 395/700, 395/821, 395/846, 179/10, 379/88, 364/200, 364/900, 370/95.3, 391/425, 371/40.1
• US Class Current: 710/29
• CPC Class Codes: G06F 13/161 with latency improvement
• CPC Class Codes: G06F 13/1615 using a concurrent pipeline structrure

Abstract

A data processing system includes one or more processors connected to a common bus, one or more I/O controllers connected to the common bus and to one or more storage subsystems and one or more storage subsystems for storing data for use in the data processing system. One or more master controllers are included in each I/O controller for communicating with a memory controller referred to as a slave which controls data flow to and from a memory subsystem. The data bus between the I/O masters and the memory controller is a multi-drop operating synchronously on a two-by-two byte parallel interface.

Claims

1. An information handling system, comprising:

one or more processors connected to a common bus;

one or more I/O controllers connected to the common bus and to one or more storage subsystems, each I/O controller comprising;

a plurality of master controllers for communicating with a slave storage controller which controls data flow to and from a storage subsystem by granting access to one or more of the plurality of master controllers;

a data bus connecting the master controllers and the slave storage controller, said data bus operating synchronously between the master controllers and the slave storage controller;

means for controlling responses to requests over the data bus after access has been granted, the control means comprising;

means for inserting one or more control characters into a data stream, each control character having a field which identifies characteristics of data transmission between one of the master controllers and the slave memory controller; and

one or more storage subsystems for storing data.

2. A data processing system according to claim 1, further comprising:

a master control frame for controlling the operation of said one or more master controllers.

3. A data processing system according to claim 2 wherein said master control frame further comprises:

a first control frame for read operations; and

a second control frame for write or Exclusive Or operations.

4. A data processing system according to claim 1, further comprising:

a slave response frame.

5. A data processing system according to claim 4 wherein said slave response frame further comprises:

a first slave response frame in response to a read operation;

a second response frame in response to a write or Exclusive Or operation; and

a third response frame to signal success of a write or Exclusive Or operation.

6. A data processing system according to claim 1, wherein said bus further comprises:

a plurality of busses having the capability of being switched between a plurality of master controllers or a plurality of slave controllers to reduce latency and improve system performance.

7. A data processing system according to claim 1, further comprising:

a plurality of control characters for controlling data transmission on said synchronous bidirectional common bus.

8. A data processing system according to claim 7, wherein said control characters further comprise:

null characters which may be inserted in a data stream to maintain synchronization when data are delayed.

9. A data processing system according to claim 7, wherein said control characters further comprise:

cancel characters which may be inserted in a data stream for immediate termination of said data stream.

10. A data processing system according to claim 7, wherein said control characters further comprise:

a break character which may be inserted in a data stream to permit an immediate response indicating success or failure of a previous transmission.

11. A storage controller for controlling the storage of data in a storage subsystem of a data processing system, comprising:

a plurality of master controllers for communicating with a slave storage controller which controls data flow to and from a storage subsystem by granting access to one or more of the plurality of master controllers;

a data bus connecting the master controllers and the slave storage controller, said data bus operating synchronously between the master controllers and the slave storage controller;

means for controlling responses to requests over the data bus after access has been granted, the control means comprising;

means for inserting one or more control characters into a data stream, each control character having a field which identifies characteristics of data transmission between one of the master controllers and the slave memory controller.

12. A storage controller, according to claim 11, further comprising:

a master control frame for controlling the operation of said one or more master controllers.

13. A storage controller, according to claim 12, wherein said master control frame further comprises:

a first control frame for read operations; and

a second control frame for write or Exclusive Or operations.

14. A storage controller, according to claim 11, wherein said control field comprises:

a first portion for identifying one of said master controllers;

a second portion for identifying a type of operation to be performed; and

a third portion for identifying an outstanding request.