Circuit comprising a data communication bus
First Claim
1. A circuit comprising a communication bus whereto a plurality of sub-circuits are connected, each sub-circuit being arranged to transmit data by driving the bus alternatively in a dominant or recessive manner, the bus to enter a dominant state when any one of the sub-circuits drives the bus in a dominant manner and to enter a recessive state when all sub-circuits drive the bus in a recessive manner, the sub-circuits being arranged to receive data by detecting the state of the bus, said bus comprising a first and a second bus line which are interconnected via a repeater interface, in which circuit each of the first and second bus lines has at least one of the sub-circuits connected to it, the dominant and the recessive state corresponding to a dominant and a recessive level, respectively, of potentials on the first and the second bus line, the repeater interface being arranged to provide logically corresponding levels of the potentials on the first and the second bus line, characterized in that the circuit comprises means which are arranged to make the potentials on the first and the second bus line assume a respective recessive level in the absence of dominant driving and independently of one another, and that the repeater interface renders a connection between the first and the second bus line conductive when the potential on the first at least one of bus line and the second bus line is between the dominant level and a reference level of the relevant bus line, and to render the connection isolating when the potential on the first and the second bus line is between the reference level of the relevant bus line and the respective recessive level of the relevant bus line.
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Accused Products
Abstract
Information is supplied to a bus in a wired logic function, the potential on the bus either being pulled down to ground level or remaining at supply level. The data line in a bus is split into two parts which are interconnected via the main current channel a transistor. Different supply voltages are used on the two parts. The control electrode of the transistor is connected to the lowest of the supply voltages. The transistor becomes conductive when either of the parts is pulled down. The transistor is non-conductive when none of the parts is pulled down.
140 Citations
11 Claims
- 1. A circuit comprising a communication bus whereto a plurality of sub-circuits are connected, each sub-circuit being arranged to transmit data by driving the bus alternatively in a dominant or recessive manner, the bus to enter a dominant state when any one of the sub-circuits drives the bus in a dominant manner and to enter a recessive state when all sub-circuits drive the bus in a recessive manner, the sub-circuits being arranged to receive data by detecting the state of the bus, said bus comprising a first and a second bus line which are interconnected via a repeater interface, in which circuit each of the first and second bus lines has at least one of the sub-circuits connected to it, the dominant and the recessive state corresponding to a dominant and a recessive level, respectively, of potentials on the first and the second bus line, the repeater interface being arranged to provide logically corresponding levels of the potentials on the first and the second bus line, characterized in that the circuit comprises means which are arranged to make the potentials on the first and the second bus line assume a respective recessive level in the absence of dominant driving and independently of one another, and that the repeater interface renders a connection between the first and the second bus line conductive when the potential on the first at least one of bus line and the second bus line is between the dominant level and a reference level of the relevant bus line, and to render the connection isolating when the potential on the first and the second bus line is between the reference level of the relevant bus line and the respective recessive level of the relevant bus line.
Specification
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- Resources
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Current AssigneeFuture Link Systems, LLC (Vector Capital Corporation)
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Original AssigneeUS Philips Corporation (Koninklijke Philips N.V.)
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InventorsSchutte, Herman
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Primary Examiner(s)Hudspeth, David R.
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Application NumberUS08/565,774Time in Patent Office718 DaysField of Search326/86, 326/21, 326/31, 326/62, 327/430-431, 370/85.1, 370/85.9, 370/85.11, 370/97US Class Current326/86CPC Class CodesG06F 13/4072 Drivers or receivers G06F13...
