Apparatus and method for packetizing and segmenting MPEG packets

• US 5,689,509 A
• Filed: 11/08/1996
• Issued: 11/18/1997
• Est. Priority Date: 07/07/1995
• Status: Expired due to Term

• Current Assignee: Sun Microsystems Incorporated (Oracle Corporation)
• Original Assignee: Sun Microsystems Incorporated (Oracle Corporation)
• Inventors: Oskouy, Rasoul, Gaytan, Andre J., Gentry, Denny
• Primary Examiner(s): HSU, ALPUS
• Application Number:
  US08/748,554
• Time in Patent Office: 375 Days
• Field of Search: 370/389, 370/395, 370/396, 370/400, 370/401, 370/402, 370/403, 370/470, 370/471, 370/472, 370/473, 370/474, 348/6.7, 348/426, 348/441, 348/460, 348/461, 348/465, 348/467, 348/469, 348/473, 348/474
• US Class Current: 370/396
• CPC Class Codes: H04L 2012/5616 Terminal equipment, e.g. codecs, synch.
• CPC Class Codes: H04L 2012/5652 Cell construction, e.g. including header, packetisation, depacketisation, assembly, reassembly
• CPC Class Codes: H04N 21/2381 Adapting the multiplex stream to a specific network, e.g. an Internet Protocol [IP] network transmission of MPEG streams over ATM H04L12/5601
• CPC Class Codes: H04N 21/64307 ATM
• CPC Class Codes: H04Q 11/0478 Provisions for broadband connections

Abstract

A circuit and method for optimizing efficiency in transferring a block of data having a plurality of frames of limited size from a memory element. The circuit comprises a transmit ("TX") DMA engine and a TX Segmentation engine. The TX DMA engine is responsible for accessing overhead information for the block of data within a TX data buffer from a data descriptor dedicated to that particular TX data buffer. The TX DMA engine is further responsible for reading the block of data from the memory element to be stored local thereto. The TX Segmentation engine is responsible for segmenting the block of data into a plurality of cell packets corresponding in number to the plurality of frames. Each cell packet contains in common the overhead information for the block of data to avoid the TX DMA engine re-accessing the data descriptor to obtain the same overhead information for each frame being transferred.

Claims

1. A method for optimizing efficiency in transferring a block of data stored in a memory element, the method comprising the steps of:

accessing a plurality of overhead parameters from a data descriptor stored in the memory element, said data descriptor providing information about the block of data;

packetizing the block of data into a plurality of MPEG packets;

segmenting the plurality of MPEG packets to produce a plurality of cell packets, each of said plurality of cell packets contains in common at least one of said plurality of overhead parameters; and

loading a ring entry number identifying at least the data descriptor into an entry of a transmit completion ring of the memory element.

2. The method according to claim 1, wherein the step of accessing the plurality of overhead parameters includes the steps of:

checking a control bit in the data descriptor to determine if MPEG packetization is desired; and

accessing at least one of the overhead parameters if the control bit is set, the step of accessing at least one of the overhead parameters including the steps of

accessing a first overhead parameter being a starting address of the block of data within the memory element, and

accessing a second overhead parameter being a frame number indicating the number of MPEG frames contained in the block of data.

3. The method according to claim 2, wherein said step of accessing at least one of the overhead parameters further includes the step of accessing a third overhead parameter being a frame size indicating the number of bytes in each MPEG frame of said block of data.

4. The method according to claim 3, wherein said step of accessing at least one of the overhead parameters further includes the steps of

accessing a fourth overhead parameter being a control and length field providing control information and total payload length information for each of the plurality of cell packets;

and

accessing a fifth overhead parameter being a cell header providing header information for each of the plurality of cell packets.

5. The method according to claim 4, wherein the step of accessing the plurality of overhead parameters includes the step of

storing the fourth and fifth overhead parameters in a transmit buffer memory for use by the plurality of cell packets.

6. The method according to claim 2, wherein said packetizing step includes the steps of

(i) reading a MPEG frame of a plurality of MPEG frames forming the block of data from the memory element;

(ii) storing the MPEG frame as a corresponding MPEG packet in the transmit buffer memory;

(iii) setting at least one header tag bit associated with each word of the MPEG packet to a first predetermined value; and

(iv) decrementing the frame number by one, wherein

if the frame number is greater than zero, setting the at least one header tag bit associated with a last

word of the MPEG packet to a second predetermined value and continue performing steps (i)-(iv) on a successive frame, and

if the frame number is equal to zero, setting the at least one header tag bit associated with the last

word of the MPEG packet to a third predetermined value and returning to access a plurality of overhead parameters

associated with a second data descriptor stored in the memory element, said second data descriptor providing control information about a second block of data.

7. The method according to claim 6, wherein said segmenting step includes the steps of

(i) determining whether the plurality of MPEG packets are being stored in the transmit buffer memory;

and

(ii) reading in succession each word entry of a MPEG packet of the plurality of MPEG packets, wherein the reading step includes the step of

appending contents of a control and length field to a cell packet of the plurality of cell packets corresponding to the MPEG packet, provided a first condition is detected.

8. The method according to claim 7, wherein the first condition is the at least one header tag bit of the word entry indicates that the word entry is storing a last byte of the block of data.

9. The method according to claim 7, wherein the reading step further includes the step of

appending the contents of the control and length field to the cell packet of the plurality of cell packets corresponding to the MPEG packet;

and

using the overhead parameters associated with the MPEG packet for producing a cell packet of the plurality of cell packets corresponding to the subsequent MPEG packet, provided a second condition is detected.

10. The method according to claim 9, wherein the second condition is the at least one header tag bit of the word entry indicates that the word entry is storing a last byte of the MPEG packet to be followed by a subsequent MPEG packet.

11. The method according to claim 9, wherein the reading step further includes the step of

continuing construction of the cell packet corresponding to the MPEG packet provided a third condition is detected, said third condition is the word entry is a twelfth consecutive word entry to be read.

12. The method according to claim 11, wherein the reading step further includes the step of

continuing the reading step for a next successive word entry of the MPEG packet, provided the first, second and third conditions are not detected.

13. A circuit for optimizing efficiency in transferring a block of data from a memory element to a transmit buffer memory, the circuit comprising:

a transmit DMA engine coupled to the transmit buffer memory, said transmit DMA engine accesses a plurality of overhead parameters from a data descriptor stored in the memory element, and packetizes the block of data into a plurality of packets, and sets header tag bits for each of the plurality of packets to provide information about its content; and

a transmit segmentation engine coupled to the transmit buffer memory, the transmit segmentation engine segmenting the plurality of packets to accommodate variations in memory size of the transmit buffer memory.

14. The circuit according to claim 13, wherein said transmit DMA engine packetizes the block of data having a plurality of MPEG frame by (i) reading a MPEG frame of said plurality of MPEG frames from the memory element, (ii) storing the MPEG frame as a corresponding MPEG packet in the transmit buffer memory, (iii) setting at least one header tag bit associated with each word of the MPEG packet to a first predetermined value, and (iv) decrementing a frame number being one of the plurality of overhead parameters indicating the number of MPEG frames in the block of data.

15. The circuit according to claim 14, wherein said transmit DMA engine sets the at least one header tag bits associated with a last word of the MPEG packet to a second predetermined value and continues performing steps (i)-(iv) on a successive frame, if the frame number is greater than zero, and sets the at least one header tag bits associated with the last word of the MPEG packet to a third predetermined value and waits to access a plurality of overhead parameters associated with a second data descriptor stored in the element memory, if the frame number is equal to zero, said second data descriptor providing control information about a second block of data.

16. The circuit according to claim 13, wherein said transmit segmentation engine further segmenting the plurality of packets in order to produce a plurality of cell packets transmitted from the circuit, each of said plurality of cell packets contains in common at least one of said plurality of overhead parameters.

17. A network interface circuit for enabling a host system including host memory to communicate with a remote system, the network interface circuit comprising:

a system bus interface coupled to the host system in order to access a block of data stored in the host memory;

a transmit buffer memory coupled to the system bus interface;

a system and ATM layer core configured to convert the block of data into a plurality of cell packets suitable for transmission to the remote system, the system and ATM layer core including

a transmit DMA engine coupled to said transmit buffer memory, said transmit DMA engine being configured to access a plurality of overhead parameters from a data descriptor stored in the memory element, to packetize the block of data into a plurality of MPEG packets and to set at least one header tag bit for each word in the MPEG packet to indicate a location of the word in the plurality of MPEG frames, and

a transmit segmentation engine coupled to said transmit buffer memory, said transmit segmentation engine being configured to segment the plurality of MPEG packets in order to produce the plurality of cell packets.

18. The network interface circuit according to claim 17, wherein said transmit DMA engine packetizes the block of data by (i) reading a MPEG frame of said plurality of MPEG frames from the memory element, (ii) storing the MPEG frame as a corresponding MPEG packet in the transmit buffer memory, (iii) setting at least one header tag bit associated with each word of the MPEG packet to a first predetermined value, and (iv) decrementing a frame number being one of the plurality of overhead parameter indicating the number of MPEG frames in the block of data, wherein

if the frame number is greater than zero,

the transmit DMA engine sets the at least one header tag bits associated with a last word of the MPEG packet to a second predetermined value and continues performing steps (i)-(iv) on a successive frame, and if the frame number is equal to zero,

the transmit DMA engine sets the at least one header tag bits associated with the last word of the MPEG packet to a third predetermined value and waits to access a plurality of overhead parameters associated with a second data descriptor stored in the element memory, said second data descriptor providing control information about a second block of data.

19. The network interface circuit according to claim 18, wherein each MPEG packet of the plurality of MPEG packets corresponds to and is produced from one of the plurality of MPEG frames.

20. A method for optimizing efficiency in transferring a block of data in a memory element, the method comprising the steps of:

accessing a plurality of overhead parameters from a data descriptor pointing to the block of data;

packetizing the block of data into a plurality of packets; and

segmenting the plurality of packets to produce a plurality of cell packets, each of the plurality of cell packets contains in common at least one of said plurality of overhead parameters; and

loading a ring number identifying the data description into an entry of a transmit completion ring of the memory element upon completion of transmission of the plurality of cell packets.