Process for polishing and analyzing an exposed surface of a patterned semiconductor
First Claim
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1. A process for polishing a layer over a patterned semiconductor substrate comprising the steps of:
- forming the layer over the patterned semiconductor substrate, wherein the layer has a first exposed surface that lies at a first elevation and a second elevation that is different from the first elevation and has a first edge that lies between the first and second elevations;
polishing the layer to form a second exposed surface; and
analyzing the second exposed surface with a radiation beam wherein the step of polishing is repeated if the radiation beam is reflected by the first edge.
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Abstract
A layer over a patterned semiconductor is polished and analyzed to determine a polishing endpoint. The analysis may be performed using reflected radiation beams or by a radiation scattering analyzer. The analysis may be performed on virtually any layer using a radiation source. The analysis may be performed with a liquid, such as an aqueous slurry, contacting the substrate. The polishing and analysis may be integrated such that both steps are performed on the same polisher.
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Citations
25 Claims
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1. A process for polishing a layer over a patterned semiconductor substrate comprising the steps of:
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forming the layer over the patterned semiconductor substrate, wherein the layer has a first exposed surface that lies at a first elevation and a second elevation that is different from the first elevation and has a first edge that lies between the first and second elevations; polishing the layer to form a second exposed surface; and analyzing the second exposed surface with a radiation beam wherein the step of polishing is repeated if the radiation beam is reflected by the first edge. - View Dependent Claims (2, 3, 4, 5, 6, 17, 18, 19)
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7. A process for polishing a layer over a patterned semiconductor substrate comprising the steps of:
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forming the layer over the patterned semiconductor substrate, wherein; the patterned semiconductor substrate has a substrate surface that lies at a plurality of substrate elevations, wherein substrate edges lie between different elevations within the plurality of substrate elevations; the layer has a first exposed surface that lies at a first elevation and a second elevation that is different from the first elevation, wherein a first edge lies between the first and second elevations; polishing the layer to form a second exposed surface having a second topography; and analyzing the second exposed surface with a radiation beam to form an output, wherein the step of polishing is repeated until only the substrate edges, and not the first edge, are detected in the output. - View Dependent Claims (8, 9, 10, 20, 21, 22, 23, 24, 25)
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11. A process for polishing a layer over a patterned semiconductor substrate comprising the steps of:
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forming the layer over the patterned semiconductor substrate, wherein the layer has a first exposed surface; polishing the layer to form a second exposed surface with a slurry having slurry particles; analyzing the second exposed surface at a location with a radiation beam, wherein this step is performed while particles are present at the location; and drying the patterned semiconductor substrate after the step of analyzing. - View Dependent Claims (12, 13, 14, 15, 16)
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Specification