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Process for polishing and analyzing an exposed surface of a patterned semiconductor

  • US 5,691,253 A
  • Filed: 06/05/1995
  • Issued: 11/25/1997
  • Est. Priority Date: 06/02/1994
  • Status: Expired due to Term
First Claim
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1. A process for polishing a layer over a patterned semiconductor substrate comprising the steps of:

  • forming the layer over the patterned semiconductor substrate, wherein the layer has a first exposed surface that lies at a first elevation and a second elevation that is different from the first elevation and has a first edge that lies between the first and second elevations;

    polishing the layer to form a second exposed surface; and

    analyzing the second exposed surface with a radiation beam wherein the step of polishing is repeated if the radiation beam is reflected by the first edge.

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