Process for manufacturing a programmable power generation circuit for flash EEPROM memory systems

• US 5,693,570 A
• Filed: 11/18/1996
• Issued: 12/02/1997
• Est. Priority Date: 10/17/1994
• Status: Expired due to Fees

• Current Assignee: SanDisk Corporation (Western Digital Corporation)
• Original Assignee: SanDisk Corporation (Western Digital Corporation)
• Inventors: Cernea, Raul-Ardian, Mofidi, Mehrdad, Lee, Douglas J., Mehrotra, Sanjay
• Primary Examiner(s): Graybill, David
• Application Number:
  US08/746,833
• Time in Patent Office: 379 Days
• Field of Search: 437/205, 437/209, 437/919
• US Class Current: 438/107
• CPC Class Codes: G11C 16/16 for erasing blocks, e.g. arrays, words, groups
• CPC Class Codes: G11C 16/30 Power supply circuits

Abstract

A process for manufacturing a flash EEPROM system functioning as a mass storage medium for a host computer includes a controller and at least one flash EEPROM memory module. The flash EEPROM memory module includes at least one flash EEPROM chip having an on-chip programmable power generation circuit including a high voltage generator circuit capable of generating a high voltage Vpp from a logic level voltage Vdd provided to the chip, a serial protocol logic circuit, a data latch, a data bus, a register address decoder, and a multi-voltage generator/regulator. The multi-voltage generator/regulator includes a plurality of registers and provides the programming, reading, and erasing voltages required for proper operation of the flash EEPROM system from digital values stored in the plurality of registers by the controller. The high voltage generator circuit includes both high current and low current charge pump circuits for generating the high voltage Vpp. The high current charge pump circuit is connected to relatively large off-chip charge storage devices, and the low current charge pump circuit is connected to relatively small on-chip charge storage devices. The controller may activate one or the other of the high or low current charge pump circuits through control signals connected to enabling circuitry respectively connected to the high and low current charge pump circuits. Alternatively, the controller may deactivate both the high and low current charge pump circuits and cause the high voltage Vpp to be provided from other circuitry on another flash EEPROM chip in the flash EEPROM module.

Claims

1. A method of forming a charge pump circuit on a substrate comprising the steps of:

mounting a charge storage unit on said substrate; and

mounting a flash EEPROM chip including a switching circuit on said substrate such that said switching circuit is coupled through a plurality of nodes to said charge storage unit to form said charge pump circuit.

2. The method as recited in claim 1, wherein said charge storage unit mounting step comprises the step of mounting a plurality of discrete capacitors on said substrate.

3. A method of forming a plurality of charge pump circuits on a substrate, comprising the steps of:

mounting a charge storage unit on said substrate; and

mounting a plurality of flash EEPROM chips including a plurality of switching circuits on said substrate such that said plurality of switching circuits are coupled to said charge storage unit to form said plurality of charge pump circuits.

4. The method as recited in claim 3, wherein said charge storage unit mounting step comprises the step of mounting a plurality of discrete capacitors on said substrate.