Transmitting circuitry for serial transmission of encoded information

• US 5,694,428 A
• Filed: 02/07/1995
• Issued: 12/02/1997
• Est. Priority Date: 03/12/1992
• Status: Expired due to Term

• Current Assignee: NTP Incorporated
• Original Assignee: NTP Incorporated
• Inventors: Campana, Thomas J. Jr.
• Primary Examiner(s): Chin, Stephen
• Assistant Examiner(s): GHAYOUR, MOHAMMAD H
• Application Number:
  US08/385,143
• Time in Patent Office: 1,029 Days
• Field of Search: 375/260, 370/100.1, 370/105.1, 370/105.4, 370/503, 370/509, 370/511, 370/512
• US Class Current: 375/260
• CPC Class Codes: H04B 7/10 Polarisation diversity; Directional diversity
• CPC Class Codes: H04L 1/004 by using forward error control H04L1/0618 takes precedence; coding, decoding or code conversion, for error detection or correction H03M13/00
• CPC Class Codes: H04L 1/02 by diversity reception
• CPC Class Codes: H04L 27/22 Demodulator circuits; Receiver circuits
• CPC Class Codes: H04L 7/042 Detectors therefor, e.g. correlators, state machines digital correlators in general G06F17/15
• CPC Class Codes: H04W 84/042 Public Land Mobile systems, e.g. cellular systems

Abstract

The present invention provides reconstruction and resynchronization of wireless serial transmissions which are subject to fading causing erroneous uncorrectable bit errors exceeding the error correction code correction capacity present in frames of digitally encoded data. Valid data is reconstructed in frames which are determined to contain at least one erroneous uncorrectable bit exceeding the bit error correction capacity of the error correction code therein which have all erroneous uncorrectable bits within the error correction code bit held. A synchronization marker is transmitted with each frame group which does not represent any valid data in a frame. Detection of the synchronization marker by a digital signal processor after at least one frame is determined to contain at least one erroneous uncorrectable bit, which is indicative of a loss of synchronism of the receiving circuitry clock, resynchronizes the clock of a processor of the receiving circuitry. After resynchronization of the clock, frames beginning with the at least one frame containing the at least one erroneous uncorrectable bit indicative of the loss of clock synchronism to the frames in the frame group containing the synchronization marker are reconstructed to recover a data in frames which do not contain at least one erroneous uncorrectable bit and, as described above, to recover valid data bits in frames containing at least one erroneous uncorrectable bit. Finally, frames transmitted after the detected synchronization marker are processed synchronously including reconstruction or resynchronization as described above.

Claims

1. A process for transmitting a plurality of frames of information with a radio frequency carrier comprising:

modulating a subcarrier with at least one identification frame group which identifies receiving circuitry to receive the information followed at least one data group, each identification frame group at least one frame containing bits identifying the circuitry to receive the radio frequency carrier, a plurality of bits of error correction code in each frame, and synchronization information for originally synchronizing a clock of the receiving circuitry and a synchronization marker comprised of a plurality of bits for resynchronizing the clock of the receiving circuitry, and each data frame group having at least one frame each including a plurality of bits of error correction code and a plurality of bits of data, and another synchronization marker comprised of a plurality of bits for resynchronizing the clock of the receiving circuitry during the transmission of the plurality of frames of information when a loss of synchronization of the clock is detected by the receiving circuitry during the transmission of the plurality of frames;

modulating the radio frequency carrier with the modulated subcarrier; and

transmitting the modulated carrier.

2. A process in accordance with claim 1 wherein:

each frame group contains a frame group address comprised of a plurality of bits which identify a unique address of the frame group within the plurality of frames of transmitted information.

3. A process in accordance with claim 1 wherein:

cycles of the subcarrier are modulated with pulse width modulation with a width of parts of the subcarrier being modulated with at least one bit of the frames of the information.

4. A process in accordance with claim 1 wherein:

cycles of the subcarrier are modulated with bits encoding the plurality of frames of information with each cycle of the subcarrier being modulated by the bits at a plurality of separated angular positions.

5. A process in accordance with claim 2 wherein:

cycles of the subcarrier are modulated with pulse width modulation with a width of parts of the subcarrier being modulated with at least one bit of the frames of the information.

6. A process in accordance with claim 2 wherein:

cycles of the subcarrier are modulated with bits encoding the plurality of frames of information with each cycle of the subcarrier being modulated by the bits at a plurality of separated angular positions.

7. A process in accordance with claim 1 wherein:

the synchronization information also contains bits identifying the receiving circuitry.

8. A process in accordance with claim 2 wherein:

the synchronization information also contains bits identifying the receiving circuitry.

9. A process in accordance with claim 3 wherein:

the synchronization information also contains bits identifying the receiving circuitry.

10. A process in accordance with claim 4 wherein:

the synchronization information also contains bits identifying the receiving circuitry.

11. A process in accordance with claim 5 wherein:

the synchronization information also contains bits identifying the receiving circuitry.

12. A process in accordance with claim 6 wherein:

the synchronization information also contains bits identifying the receiving circuitry.

13. A process in accordance with claim 1 wherein:

the identification frame group also contains a command field containing at least one bit for commanding a function to be performed by the receiving circuitry.

14. A process in accordance with claim 2 wherein:

the identification frame group also contains a command field containing at least one bit for commanding a function to be performed by the receiving circuitry.

15. A process in accordance with claim 3 wherein:

the identification frame group also contains a command field containing at least one bit for commanding a function to be performed by the receiving circuitry.

16. A process in accordance with claim 4 wherein:

the identification frame group also contains a command field containing at least one bit for commanding a function to be performed by the receiving circuitry.

17. A process in accordance with claim 5 wherein:

the identification frame group also contains a command field containing at least one bit for commanding a function to be performed by the receiving circuitry.

18. A process in accordance with claim 6 wherein:

the identification frame group also contains a command field containing at least one bit for commanding a function to be performed by the receiving circuitry.

19. A process in accordance with claim 7 wherein:

the identification frame group also contains a command field containing at least one bit for commanding a function to be performed by the receiving circuitry.

20. A process in accordance with claim 8 wherein:

the identification frame group also contains a command field containing at least one bit for commanding a function to be performed by the receiving circuitry.

21. A process in accordance with claim 9 wherein:

the identification frame group also contains a command field containing at least one bit for commanding a function to be performed by the receiving circuitry.

22. A process in accordance with claim 10 wherein:

the identification frame group also contains a command field containing at least one bit for commanding a function to be performed by the receiving circuitry.

23. A process in accordance with claim 11 wherein:

the identification frame group also contains a command field containing at least one bit for commanding a function to be performed by the receiving circuitry.

24. A process in accordance with claim 12 wherein:

the identification frame group also contains a command field containing at least one bit for commanding a function to be performed by the receiving circuitry.

25. Transmitting circuitry for transmitting a plurality of frames of information with a radio frequency carrier comprising:

an encoder for modulating a subcarrier with at least one identification frame group which identifies receiving circuitry to receive the information followed by at least one data frame group with each identification frame group comprising at least one frame containing bits identifying the receiving circuitry to receive

the radio frequency carrier, a plurality of bits of error correction code in each frame, synchronization information for originally synchronizing a clock of the receiving circuitry, and a synchronization marker comprised of a plurality of bits for resynchronizing the clock of the receiving circuitry with each data frame group comprising at least one frame each including a plurality of bits of error correction code and a plurality of bits of data, and another synchronization marker comprised of a plurality of bits for resynchronizing the clock of the receiving circuitry during the transmission of the plurality of frames of information when a loss of synchronization of the clock is detected by the receiving circuitry during the transmission of the plurality of frames;

a modulator, coupled to the encoder, for modulating the radio frequency carrier with the subcarrier; and

a transmitter, coupled to the modulator, for transmitting the modulated carrier.

26. Transmitting circuitry in accordance with claim 25 wherein:

each frame group contains a frame group address comprised of a plurality of bits which identify a unique address of the frame group within the plurality of frames of transmitted information.

27. Transmitting circuitry in accordance with claim 25 wherein:

cycles of the subcarrier are modulated with pulse width modulation with a width of parts of the subcarrier being modulated with at least one bit of the frames of the information.

28. Transmitting circuitry in accordance with claim 25 wherein:

cycles of the subcarrier are modulated by the encoder with bits encoding the plurality of frames of information with each cycle of the subcarrier being modulated by the bits at a plurality of separated angular positions.

29. Transmitting circuitry in accordance with claim 26 wherein:

cycles of the subcarrier are modulated with pulse width modulation with a width of parts of the subcarrier being modulated with at least one bit of the frames of the information.

30. Transmitting circuitry in accordance with claim 26 wherein:

cycles of the subcarrier are modulated by the encoder with bits encoding the plurality of frames of information with each cycle of the subcarrier being modulated by the bits at a plurality of separated angular positions.

31. Transmitting circuitry in accordance with claim 25 wherein:

the synchronization information also includes bits identifying the receiving circuitry.

32. Transmitting circuitry in accordance with claim 26 wherein:

the synchronization information also includes bits identifying the receiving circuitry.

33. Transmitting circuitry in accordance with claim 27 wherein:

the synchronization information also includes bits identifying the receiving circuitry.

34. Transmitting circuitry in accordance with claim 28 wherein:

the synchronization information also includes bits identifying the receiving circuitry.

35. Transmitting circuitry in accordance with claim 29 wherein:

the synchronization information also includes bits identifying the receiving circuitry.

36. Transmitting circuitry in accordance with claim 30 wherein:

the synchronization information also includes bits identifying the receiving circuitry.

37. Transmitting circuitry in accordance with claim 25 wherein:

the identification frame group also contains a command field containing at least one bit for commanding a function to be performed by the receiving circuitry.

38. Transmitting circuitry in accordance with claim 26 wherein:

the identification frame group also contains a command field containing at least one bit for commanding a function to be performed by the receiving circuitry.

39. Transmitting circuitry in accordance with claim 27 wherein:

the identification frame group also contains a command field containing at least one bit for commanding a function to be performed by the receiving circuitry.

40. Transmitting circuitry in accordance with claim 28 wherein:

the identification frame group also contains a command field containing at least one bit for commanding a function to be performed by the receiving circuitry.

41. Transmitting circuitry in accordance with claim 29 wherein:

the identification frame group also contains a command field containing at least one bit for commanding a function to be performed by the receiving circuitry.

42. Transmitting circuitry in accordance with claim 30 wherein:

the identification frame group also contains a command field containing at least one bit for commanding a function to be performed by the receiving circuitry.

43. Transmitting circuitry in accordance with claim 31 wherein:

the identification frame group also contains a command field containing at least one bit for commanding a function to be performed by the receiving circuitry.

44. Transmitting circuitry in accordance with claim 32 wherein:

the identification frame group also contains a command field containing at least one bit for commanding a function to be performed by the receiving circuitry.

45. Transmitting circuitry in accordance with claim 33 wherein:

the identification frame group also contains a command field containing at least one bit for commanding a function to be performed by the receiving circuitry.

46. Transmitting circuitry in accordance with claim 34 wherein:

the identification frame group also contains a command field containing at least one bit for commanding a function to be performed by the receiving circuitry.

47. Transmitting circuitry in accordance with claim 35 wherein:

the identification frame group also contains a command field containing at least one bit for commanding a function to be performed by the receiving circuitry.

48. Transmitting circuitry in accordance with claim 36 wherein:

the identification frame group also contains a command field containing at least one bit for commanding a function to be performed by the receiving circuitry.

49. A process for transmitting a plurality of frames of information with a radio frequency carrier comprising:

modulating a subcarrier with synchronization information for originally synchronizing a clock of receiving circuitry to receive the plurality of frames of the information, at least one frame group comprising at least one frame with each frame comprising a plurality of bits of error correction code and a plurality of other bits and a synchronization marker comprised of a plurality of bits for resynchronizing the clock of the receiving circuitry after initial synchronization of the clock by reception of the synchronization information during the transmission of the plurality of frames of information when a loss of synchronization of the clock is detected by the receiving circuitry during the transmission of the plurality of frames;

modulating a radio frequency carrier with the modulated subcarrier; and

transmitting the modulated carrier.

50. A process in accordance with claim 49 wherein:

each frame group contains a frame group address comprised of a plurality of bits which identify a unique address of the frame group within the plurality of frames of transmitted information.

51. A process in accordance with claim 49 wherein:

cycles of the subcarrier are modulated with pulse width modulation with a width of parts of the subcarrier being modulated with at least one bit of the frames of the information.

52. A process in accordance with claim 49 wherein:

cycles of the subcarrier are modulated with bits encoding the plurality of frames of information with each cycle of the subcarrier being modulated by the bits at a plurality of separated angular positions.

53. A process in accordance with claim 50 wherein:

cycles of the subcarrier are modulated with pulse width modulation with a width of parts of the subcarrier being modulated with at least one bit of the frames of the information.

54. A process in accordance with claim 53 wherein:

cycles of the subcarrier are modulated with bits encoding the plurality of frames of information with each cycle of the subcarrier being modulated by the bits at a plurality of separated angular positions.

55. A process in accordance with claim 49 wherein:

the at least one frame group also contains a command field containing at least one bit for commanding a function to be performed by the receiving circuitry.

56. A process in accordance with claim 50 wherein:

the at least one frame group also contains a command field containing at least one bit for commanding a function to be performed by the receiving circuitry.

57. A process in accordance with claim 51 wherein:

the at least one frame group also contains a command field containing at least one bit for commanding a function to be performed by the receiving circuitry.

58. A process in accordance with claim 52 wherein:

the at least one frame group also contains a command field containing at least one bit for commanding a function to be performed by the receiving circuitry.

59. A process in accordance with claim 53 wherein:

the at least one frame group also contains a command field containing at least one bit for commanding a function to be performed by the receiving circuitry.

60. A process in accordance with claim 54 wherein:

the at least one frame group also contains a command field containing at least one bit for commanding a function to be performed by the receiving circuitry.

61. Transmitting circuitry for transmitting a plurality of frames of information with a radio frequency carrier comprising:

an encoder for modulating a subcarrier with synchronization information for originally synchronizing a clock of receiving circuitry to receive the plurality of frames of the information, at least one frame group comprising at least one frame with each frame comprising a plurality of bits of error correction code and a plurality of other bits, and a synchronization marker comprised of a plurality of bits for resynchronizing the clock of the receiving circuitry after initial synchronization of the clock by reception of the synchronization information during the transmission of the plurality of frames of information when a loss of synchronization of the clock is detected by the receiving circuitry during the transmission of the plurality of frames;

a modulator, coupled to the encoder, for modulating a radio frequency carrier with the subcarrier; and

a transmitter, coupled to the modulator, for transmitting the modulated carrier.

62. Transmitting circuitry in accordance with claim 61 further comprising:

each frame group containing a frame group address comprised of a plurality of bits which identify a unique address of the frame group within the plurality of frames of wirelessly transmitted information.

63. Transmitting circuitry in accordance with claim 61 wherein:

cycles of the subcarrier are modulated with pulse width modulation with a width of parts of the subcarrier being modulated with at least one bit of the frames of the information.

64. Transmitting circuitry in accordance with claim 61 wherein:

cycles of the subcarrier are modulated by the encoder with bits encoding the plurality of frames of information with each cycle of the subcarrier being modulated by the bits at a plurality of separated angular positions.

65. Transmitting circuitry in accordance with claim 62 wherein:

cycles of the subcarrier are modulated with pulse width modulation with a width of parts of the subcarrier being modulated with at least one bit of the frames of the information.

66. Transmitting circuitry in accordance with claim 62 wherein:

cycles of the subcarrier are modulated by the encoder with bits encoding the plurality of frames of information with each cycle of the subcarrier being modulated by the bits at a plurality of separated angular positions.

67. Transmitting circuitry in accordance with claim 61 wherein:

the at least one frame group also contains a command field containing at least one bit for commanding a function to be performed by the receiving circuitry.

68. Transmitting circuitry in accordance with claim 62 wherein:

the at least one frame group also contains a command field containing at least one bit for commanding a function to be performed by the receiving circuitry.

69. Transmitting circuitry in accordance with claim 63 wherein:

the at least one frame group also contains a command field containing at least one bit for commanding a function to be performed by the receiving circuitry.

70. Transmitting circuitry in accordance with claim 64 wherein:

the at least one frame group also contains a command field containing at least one bit for commanding a function to be performed by the receiving circuitry.

71. Transmitting circuitry in accordance with claim 65 wherein:

the at least one frame group also contains a command field containing at least one bit for commanding a function to be performed by the receiving circuitry.

72. Transmitting circuitry in accordance with claim 65 wherein:

the identification frame group also contains a command field containing at least one bit for commanding a function to be performed by the receiving circuitry.

73. Transmitting circuitry in accordance with claim 66 wherein:

the identification frame group also contains a command field containing at least one bit for commanding a function to be performed by the receiving circuitry.