Dual rate power control loop for a transmitter

• US 5,697,074 A
• Filed: 03/30/1995
• Issued: 12/09/1997
• Est. Priority Date: 03/30/1995
• Status: Expired due to Term

• Current Assignee: Nokia Technologies Oy (Nokia Corporation)
• Original Assignee: Nokia Mobile Phones UK Limited (Nokia Corporation)
• Inventors: Pakonen, Hannu, Savolainen, Jorma, Klemetti, Raimo, Tuutijarvi, Mika, Makikallio, Eero
• Primary Examiner(s): Eisenzopf, Reinhard J.
• Assistant Examiner(s): TO, DORIS HA
• Application Number:
  US08/413,589
• Time in Patent Office: 985 Days
• Field of Search: 455/126, 455/127, 455/232.1, 455/234.1, 455/234.2, 455/239.1, 455/240.1, 455/241.1, 455/242.2, 455/244.1, 455/115, 455/67.1, 455/117, 455/116, 330/141, 330/281, 330/138, 330/280, 330/129, 330/279, 330/278, 370/95.3, 370/318, 370/294
• US Class Current: 455/126
• CPC Class Codes: H03G 3/3047 for intermittent signals, e.g. burst signals
• CPC Class Codes: H04B 2001/0416 having gain or transmission power control

Abstract

A power control loop for a radio frequency transmitter includes a power control amplifier, an output and a detector that is coupled to the output for providing an output power signal indicative of output power from the power control loop. A controller generates at least first and second reference signals. A differential amplifier provides a control output that is indicative of a difference between the output power signal and a reference signal. A dual rate filter couples the control output to the power control amplifier so as to vary its gain. The dual rate filter exhibits a fast-reacting filter mode when the controller changes the reference signals to the differential amplifier and a slow-reacting filter mode when the controller applies the first reference signal to the differential amplifier. The fast filter mode enables rapid feedback of the control output to the power control amplifier.

Claims

1. A power control loop for a radio frequency (RF) transmitter, said power control loop including power control amplifier means and an output, and further comprising:

detector means coupled to said output for providing an output power signal indicative of output power from said power control loop;

control means for generating control signals comprising at least first and second reference signals;

difference means coupled to said detector means and said control means for providing a control output indicative of a difference between said output power signal from said detector means and a control signal from said control means; and

filter means for coupling said control output from said difference means to vary gain of said power control amplifier means, said filter means exhibiting a fast filter mode when an output from said control means transitions to said first reference signal from said second reference signal and a slow filter mode at other times when said control means outputs said first reference signal, said fast filter mode enabling rapid feedback of said control output to said power control amplifier means.

2. The power control loop as recited in claim 1, wherein said slow filter mode reduces a rate of feedback of voltage variations of said control output so as to prevent said feedback from adversely affecting modulation of an RF signal being amplified by said power control amplifying means.

3. The power control loop as recited in claim 2 wherein said filter means further exhibits a fast filter mode when an output from said control means transitions from said first reference signal to said second reference signal.

4. The power control loop as recited in claim 1 wherein said RF transmitter operates to transmit time division multiple access (TDMA) signals, said signals including time slots wherein output power is ramped up to a transmission level and ramped down to a quiescent level, said control means applying further control signals to said filter means during ramp up and ramp down time slots to cause said filter means to exhibit said fast filter mode.

5. The power control loop as recited in claim 4 wherein said difference means and filter means are embodied in digital circuitry and form a portion of said control means, said control means being a digital microprocessor.

6. The power control loop as recited in claim 4 wherein said difference means is a differential amplifier and said filter means is an analog filter evidencing at least two time constants that are controllably actuatable by a switching of impedance components comprising a part thereof.