Negative voltage generator

• US 5,699,018 A
• Filed: 05/03/1996
• Issued: 12/16/1997
• Est. Priority Date: 12/08/1995
• Status: Expired due to Term

• Current Assignee: Mitsubishi Denki Kabushiki Kaisha (Mitsubishi Electric Corporation)
• Original Assignee: Mitsubishi Denki Kabushiki Kaisha (Mitsubishi Electric Corporation)
• Inventors: Yamamoto, Kazuya, Maemura, Kosei
• Primary Examiner(s): MOTTOLA, STEVEN J
• Application Number:
  US08/642,262
• Time in Patent Office: 592 Days
• Field of Search: 327/530, 327/536, 327/537, 327/543, 330/296, 330/297
• US Class Current: 330/297
• CPC Class Codes: H02M 1/14 Arrangements for reducing ripples from dc input or output
• CPC Class Codes: H02M 3/07 using capacitors charged and discharged alternately by semiconductor devices with control electrode , e.g. charge pumps
• CPC Class Codes: H03F 3/3061 Bridge type, i.e. two complementary controlled SEPP output stages
• CPC Class Codes: H03F 3/3455 with junction-FET's
• CPC Class Codes: H03K 3/354 Astable circuits

Abstract

An output voltage of a negative voltage generator contains a ripple because of a ripple occurring in a voltage produced by a charge pump circuit in the negative voltage generator. When the negative voltage is supplied to an FET amplifier, there arises a possibility that an unwanted spurious component occurs in an output of the FET amplifier. Since each of pair of circuits, that generate a negative voltage, are made mutually complementary, two charge pump circuits are used to cancel ripples. A ripple appearing in an output voltage can therefore be suppressed, and a negative voltage can eventually be supplied more stably. When the negative voltage generator is connected to, for example, an FET amplifier in order to supply a gate bias voltage to each FET in the FET amplifier, an unwanted spurious component that may be contained in an output of the FET amplifier can be removed.

Claims

1. A negative voltage generator comprising:

oscillating signal means for providing an oscillating signal and a complementary oscillating signal;

negative voltage generating means including a pair of drive circuits for amplifying the oscillating signal and the complementary oscillating signal, respectively, and a pair of charge pump circuits that reverse polarities of outputs of said pair of drive circuits, the charge pump circuits having respective output terminals that are connected together, said negative voltage generating means combining signals produced by reversing the polarities of the oscillating and complementary oscillating signals, thus generating a negative voltage; and

level control means for converting the level of the negative voltage and supplying a resultant voltage as an output voltage.

3. The negative voltage generator according to claim 1, wherein said level control means includes a source follower transistor circuit for determining the output voltage using the negative voltage as a common level, said source follower transistor circuit having either a resistive load or a constant-current load to minimize variation of the output voltage induced by an output current, and including a current mirror circuit for stabilizing a gate voltage of said source follower transistor circuit.

2. A negative voltage generator comprising:

oscillating signal means for providing an oscillating signal and a complementary oscillating signal;

negative voltage generating means for amplifying the oscillating signal and the complementary oscillating signal, and for combining signals produced by reversing the polarities of the oscillating and complementary oscillating signals, thus generating a negative voltage; and

level control means for converting the level of the negative voltage and supplying a resultant voltage as an output voltage, said level control means including a source follower transistor circuit for determining the output voltage using the negative voltage as a common level, said source follower transistor circuit having either a resistive load or a constant-current load to minimize variation of the output voltage induced by an output current, and including a current mirror circuit for stabilizing a gate voltage of said source follower transistor circuit.

4. The negative voltage generator according to claim 2, wherein said negative voltage generator is integrated with an FET amplifier, to which a negative voltage is supplied, on one chip, and an FET serving as a constant-current unit of said current mirror is formed with the same kind of FET as FETs employed in said FET amplifier.

5. The negative voltage generator according to claim 2, including a branch circuit through which a constant current flows independently of the negative voltage owing to said current mirror circuit and which is connected to a gate of said source follower transistor circuit and includes an external input voltage terminal to which a voltage is applied to adjust the output voltage.

6. The negative voltage generator according to claim 2, including a branch circuit through which a constant current flows independently of the negative voltage owing to said current mirror circuit having two current distributing circuits, each current distributing circuit including an external input voltage terminal and resistor, so that a bias current in an FET amplifier can be adjusted when said negative voltage generator is connected to the FET amplifier in order to supply the negative voltage, and so that output power can be adjusted during amplification.

7. The negative voltage generator according to claim 5, wherein said negative voltage generator is integrated with an FET amplifier, to which the negative voltage is supplied, on one chip, a constant-voltage feeding circuit including a resistor and constant-current unit for applying a constant voltage and connected to said external input voltage terminal, and an FET serving as said constant-current unit is formed with the same kind of FET as FETs employed in said FET amplifier.

8. A negative voltage generator, comprising:

oscillating signal means for providing an oscillating signal;

negative voltage generating means for amplifying the oscillating signal, for reversing polarity of the oscillating signal, and for generating a negative voltage; and

level control means for converting the level of the negative voltage and supplying a resultant voltage as an output voltage wherein said level control means includes a source follower transistor circuit for determining an output voltage using the negative voltage as a common level, said source follower transistor circuit having either a resistive load or a constant-current load to minimize variation of the output voltage induced by an output current, and said source follower transistor circuit includes a current mirror circuit for stabilizing a gate voltage of said source follower transistor circuit.

9. The negative voltage generator according to claim 8, including a branch circuit through which a constant current flows independently of the negative voltage owing to said current mirror circuit and which is connected to a gate of said source follower transistor circuit and includes an external input voltage terminal to which a voltage is applied to adjust the output voltage.

10. The negative voltage generator according to claim 8, including a branch circuit through which a constant current flows independently of the negative voltage owing to said current mirror circuit having two current distributing circuits, each current distributing circuit including an external input voltage terminal and resistor, so that a bias current in an FET amplifier can be adjusted when said negative voltage generator is connected to the FET amplifier in order to supply the negative voltage, and so that output power can be adjusted during amplification.

11. The negative voltage generator according to claim 8, wherein said negative voltage generator is integrated with an FET amplifier, to which the negative voltage is supplied, on one chip, and an FET serving as a constant-current unit of said current mirror is formed with the same kind of FET as FETs employed in said FET amplifier.

12. The negative voltage generator according to claim 9, wherein said negative voltage generator is integrated with an FET amplifier, to which the negative voltage is supplied, on one chip, a constant-voltage feeding circuit including a resistor and constant-current unit for adding a constant voltage and connected to said external input voltage terminal, and an FET serving as said constant-current unit is formed with the same kind of FET as FETs employed in said FET amplifier.