Method and apparatus for encoding a digital image signal

• US 5,699,475 A
• Filed: 02/02/1993
• Issued: 12/16/1997
• Est. Priority Date: 02/04/1992
• Status: Expired due to Fees

• Current Assignee: Sony Corporation (Sony Group Corp.)
• Original Assignee: Sony Corporation (Sony Group Corp.)
• Inventors: Yanagihara, Naofumi, Oguro, Masaki
• Primary Examiner(s): Chevalier, Robert
• Application Number:
  US08/012,480
• Time in Patent Office: 1,778 Days
• Field of Search: 358/335, 358/340, 358/342, 358/133, 358/135, 358/134, 358/136, 360/32, 386/27, 386/33, 386/34, 386/109, 386/111, 386/112, 348/384, 348/390, 348/395, 348/400, 348/403, 348/409
• US Class Current: 386/328
• CPC Class Codes: H04N 11/044 involving transform coding
• CPC Class Codes: H04N 19/124 Quantisation
• CPC Class Codes: H04N 19/14 Coding unit complexity, e.g. amount of activity or edge presence estimation H04N19/146 takes precedence
• CPC Class Codes: H04N 19/146 Data rate or code amount at the encoder output
• CPC Class Codes: H04N 19/149 by estimating the code amount by means of a model, e.g. mathematical model or statistical model
• CPC Class Codes: H04N 19/176 the region being a block, e.g. a macroblock
• CPC Class Codes: H04N 19/18 the unit being a set of transform coefficients
• CPC Class Codes: H04N 19/60 using transform coding
• CPC Class Codes: H04N 19/89 involving methods or arrangements for detection of transmission errors at the decoder
• CPC Class Codes: H04N 21/236 Assembling of a multiplex stream, e.g. transport stream, by combining a video stream with other content or additional data, e.g. inserting a URL [Uniform Resource Locator] into a video stream, multiplexing software data into a video stream; Remultiplexing of multiplex streams; Insertion of stuffing bits into the multiplex stream, e.g. to obtain a constant bit-rate; Assembling of a packetised elementary stream multiplexing of data packets for data networks, e.g. RTP/UDP H04L65/00
• CPC Class Codes: H04N 21/434 Disassembling of a multiplex stream, e.g. demultiplexing audio and video streams, extraction of additional data from a video stream; Remultiplexing of multiplex streams; Extraction or processing of SI; Disassembling of packetised elementary stream demultiplexing of data packets for data networks, e.g. RTP/UDP H04L65/00
• CPC Class Codes: H04N 5/783 Adaptations for reproducing at a rate different from the recording rate
• CPC Class Codes: H04N 9/8047 using transform coding

Abstract

A digital image signal is encoded for recording by placing in a sync block approximately an integer number of macro blocks representing orthogonally transformed image data for a certain portion of the image. When a sync block is reproduced at high speed, the reproduced data therein corresponds to a displayable portion of the image including DC components and both low and high frequency AC components. Also, each sync block contains fixed length areas for the orthogonal transform coefficient data according to the 4:1:1 (or 4:2:0) format in which four blocks of luminance coefficients and two blocks of color difference coefficients represent a certain portion of an image, and also contains at least one fixed length overflow area for the high frequency coefficients which exceed the capacity of the fixed length coefficient areas. An error in the low frequency coefficients in the fixed length areas does not harm the high frequency coefficients since they are in separately addressed areas. Before a set of macro blocks is compressed into variable length encoded data, with the amount of encoded data for each set being kept within a target value so as to fit into fixed length recording tracks, the macro blocks are shuffled so that the central portions of an image are at the beginning of the set for reducing the noticeability of errors in a reproduced image.

Claims

1. A method for encoding a digital image signal, comprising the steps of:

orthogonally transforming said digital image signal into transformed macro blocks containing DC, low frequency AC and high frequency AC components of said digital image signal,

encoding an encoding set comprised of a predetermined number of said transformed macro blocks using a variable length code into an amount of encoded data in accordance with a target amount, and

forming said encoded data corresponding to an approximately integer number of said transformed macro blocks into a first sync block having a fixed length and also having DC component areas and low frequency AC component areas at predetermined positions and at least one high frequency AC component area at least at one predetermined position, with the encoded data representing said DC and low frequency AC components being in said DC and low frequency AC component areas, respectively, and at least some of the encoded data representing said high frequency AC components being placed in said at least one high frequency AC component area in the first sync block and remaining encoded data representing said high frequency AC components exceeding said fixed length being placed in a second sync block.

2. The method of claim 1;

further comprising the steps of blocking said digital image signal into image data blocks, and shuffling a spatial sequence of said image data blocks before said step of orthogonally transforming.

3. The method of claim 2;

wherein, a predetermined number of said image data blocks form a respective shuffling set of macro blocks, and, in said step of shuffling, central macro blocks of each said shuffling set which correspond to central portions of an image represented by said digital image signal are shuffled to precede other macro blocks of the respective shuffling set which correspond to other portions of said image that are less centrally located in said image than said central portions.

4. The method of claim 1;

wherein said step of orthogonally transforming includes performing a discrete cosine transformation on said digital image signal to produce said transformed macro blocks.

5. The method of claim 1;

wherein said step of encoding includes estimating a quantizing number for said encoding set based on said target amount, quantizing said macro blocks in said encoding set in accordance with said quantizing number, and variable length coding the quantized macro blocks using said variable length code.

6. The method of claim 1;

wherein said first sync block also includes a data area having a starting position, and said at least one high frequency AC component area is located near said starting position of said data area.

7. A method for encoding a digital image signal, comprising the steps of:

orthogonally transforming said diqital image signal into transformed macro blocks containing DC and low frequency AC components of said digital image signal;

encoding an encoding set comprised of a predetermined number of said transformed macro blocks using a variable length code into an amount of encoded data in accordance with a target amount, said transformed macro blocks being respectively comprised of a predetermined number of transformed image data blocks which each contain AC component data representing high frequency AC components and said low frequency AC components; and

forming said encoded data corresponding to an approximately integer number of said transformed macro blocks into a sync block having a fixed length and also having DC component areas and low frequency AC component areas at predetermined positions and at least one high frequency AC component area at least at one predetermined position, with the encoded data representing said DC and low frequency AC component being in said DC and low frequency AC component areas, respectively, and at least some of the encoded data representing said high frequency AC components being placed in the at least high frequency AC component area in said sync block, and with the number of said low frequency AC component areas in said sync block being equal to said predetermined number of transformed image data blocks in each of said transformed macro blocks, said step of forming including first placing AC component data of one of said transformed image data blocks in a transformed macro block into a respective one of said low frequency AC component areas until said respective one of said low frequency AC component areas is filled, next placing further AC Component data of said one of said transformed image data blocks which exceeds the capacity of said respective one of said low frequency AC component areas into said high frequency AC component area and unused areas of other of said low frequency AC component areas which contain AC component data for other of said transformed image data blocks, and finally placing as yet unplaced AC component data of said one of said transformed image data blocks into another sync block.

8. An apparatus for encoding a digital image signal, comprising:

means for orthogonally transforming said digital image signal into transformed macro blocks containing DC, low frequency AC and high frequency AC components of said digital image signal,

means for encoding an encoding set comprised of a predetermined number of said transformed macro blocks using a variable length code into an amount of encoded data in accordance with a target amount, and

framing means for forming said encoded data corresponding to an approximately integer number of said transformed macro blocks into a first sync block having a fixed length and also having DC component areas and low frequency AC component areas at predetermined positions and at least one high frequency AC component area at least at one predetermined position, with the encoded data representing said DC and low frequency AC components being in said DC and low frequency AC component areas, respectively, and at least some of the encoded data representing said high frequency AC components being placed in said at least one high frequency AC component area in the first sync block and remaining encoded data representing said high frequency AC components exceeding said fixed length being placed in a second sync block.

9. The apparatus of claim 8;

further comprising means for blocking said digital image signal into image data blocks, and means for shuffling a spatial sequence of said image data blocks before said image data blocks are orthogonally transformed.

10. The apparatus of claim 9;

wherein a predetermined number of said image data blocks form a respective shuffling set of macro blocks, and said means for shuffling shuffles central macro blocks of each said shuffling set which correspond to central portions of an image represented by said digital image signal to precede other macro blocks of said shuffling set which correspond to other portions of said image that are less centrally located in said image than said central portions.

11. The apparatus of claim 8;

wherein said means for orthogonally transforming performs a discrete cosine transformation on said digital image signal to produce said transformed macro blocks.

12. The apparatus of claim 8;

wherein said means for encoding includes means for estimating a quantizing number for said encoding set based on said target amount, means for quantizing said macro blocks in said encoding set in accordance with said quantizing number, and means for variable length coding the quantized macro blocks using said variable length code.

13. The apparatus of claim 8;

wherein said first sync block also includes a data area having a starting position, and said at least one high frequency AC component area is located near said starting position of said data area.

14. An apparatus for encoding a digital image signal, comprising:

means for orthogonally transforming said digital image signal into transformed macro blocks containing DC and low frequency AC components of said digital image signal;

means for encoding an encoding set comprised of a predetermined number of said transformed macro blocks using a variable length code into an amount of encoded data in accordance with a target amount, said transformed macro blocks being respectively comprised of a predetermined number of transformed image data blocks which each contain AC component data representing high frequency AC components and said low frequency AC components; and

framing means for forming said encoded data corresponding to an approximately integer number of said transformed macro blocks into a sync block having a fixed length and also having DC component areas and low frequency AC component areas at predetermined positions and at least one high frequency AC component area at least at one predetermined position, with the encoded data representing said DC and low frequency Ac components being in said DC and low frequency AC component areas, respectively, and at least some of the encoded data representing said high frequency AC components being placed in the at least high frequency AC component area in said sync block, and with the number of said low frequency AC component areas in said sync block being equal to said predetermined number of transformed image data blocks in each of said transformed macro blocks, said framing means including first means for placing AC component data of one of said transformed image data blocks in a transformed macro block into a respective one of said low frequency AC component areas until said respective one of said low frequency AC component areas is filled, second means for placing further AC component data of said one of said transformed image data blocks which exceeds the capacity of said respective one of said low frequency AC component areas into said high frequency AC component area and unused areas of other of said low frequency AC component areas which contain AC component data for other of said transformed image data blocks, and third means for placing as yet unplaced AC component data of said one of said transformed image data blocks into another sync block.