Method of forming bond pad structure for the via plug process

• US 5,700,735 A
• Filed: 08/22/1996
• Issued: 12/23/1997
• Est. Priority Date: 08/22/1996
• Status: Expired due to Term

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Shieh, Pi-Chen, Shiue, Ruey-Yun, Wu, Wen-Teng, Liu, Chin-Kai
• Primary Examiner(s): QUACH, TUAN N
• Application Number:
  US08/703,918
• Time in Patent Office: 488 Days
• Field of Search: 437/183, 437/195, 437/211, 438/612, 438/622, 438/637, 438/672
• US Class Current: 438/612
• CPC Class Codes: H01L 2224/04042 Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
• CPC Class Codes: H01L 2224/05093 of a plurality of vias
• CPC Class Codes: H01L 2224/05094 at the center of the internal layers
• CPC Class Codes: H01L 2224/05095 at the periphery of the internal layers
• CPC Class Codes: H01L 2224/05096 Uniform arrangement, i.e. array
• CPC Class Codes: H01L 2224/05556 in side view
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/45099 Material
• CPC Class Codes: H01L 2224/48463 the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
• CPC Class Codes: H01L 2224/85399 Material
• CPC Class Codes: H01L 24/03 Manufacturing methods
• CPC Class Codes: H01L 24/05 of an individual bonding area
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 2924/00011 Not relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01005 Boron [B]
• CPC Class Codes: H01L 2924/01006 Carbon [C]
• CPC Class Codes: H01L 2924/01013 Aluminum [Al]
• CPC Class Codes: H01L 2924/01014 Silicon [Si]
• CPC Class Codes: H01L 2924/01015 Phosphorus [P]
• CPC Class Codes: H01L 2924/01022 : Titanium [Ti]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/0105 : Tin [Sn]
• CPC Class Codes: H01L 2924/01074 : Tungsten [W]
• CPC Class Codes: H01L 2924/04941 : TiN
• CPC Class Codes: H01L 2924/14 : Integrated circuits

Abstract

A bond pad structure and method of forming the bond pad structure which provides for reliable interconnections between the bond pad structure and the next level of circuit integration. The bond pad structure uses three metal pads separated by layers of dielectric. Via plugs are formed between the first and second metal pads and between the second and third metal pads. The via plugs are formed in a diamond shape with respect to the metal pads. The metal pads are squares with the same orientation. The periphery of the via plugs forms a square rotated 45° with respect to the square metal pads.

Claims

1. A method of forming a bond pad, comprising the steps of:

forming a first dielectric layer;

forming a square first metal pad on said first dielectric layer;

forming a second dielectric layer over said first metal pad;

forming a first number of holes in said second dielectric layer;

filling said first number of holes with a fourth metal thereby forming a first number of first via plugs wherein said first via plugs contact said first metal pad and said first number of holes are located such that said first number of first via plugs lie within a first square rotated 45°

with respect to said first metal pad;

forming a square second metal pad over said second dielectric layer and said first via plugs wherein said second metal pad is directly above said first metal pad and has the same orientation as said first metal pad, and said second metal pad contacts said first via plugs;

forming a third dielectric layer over said second metal pad;

forming a second number of holes in said third dielectric layer;

filling said second number of holes with a fifth metal thereby forming a second number of second via plugs wherein said second via plugs contact said second metal pad;

forming a square third metal pad over said third dielectric layer and said second via plugs wherein said third metal pad is directly above said second metal pad, said third metal pad has the same orientation as said second metal pad, said third metal pad contacts said second via plugs, and said second number of holes are located such that said second number of second via plugs lie within a second square rotated 45°

with respect to said third metal pad;

forming a fourth dielectric layer over said third metal pad; and

forming an opening in said fourth dielectric layer directly above said third metal pad thereby exposing said third metal pad.

2. The method of claim 1 wherein said first metal pad is AlCu/TiN.

3. The method of claim 1 wherein said second metal pad is AlCu/TiN.

4. The method of claim 1 wherein said third metal pad is AlCu/TiN.

5. The method of claim 1 wherein said fourth metal is tungsten.

6. The method of claim 1 wherein said fifth metal is tungsten.

7. The method of claim 1 where said first number of first vias is between about 70 and 110.

8. The method of claim 1 wherein said second number of second vias is between about 85 and 135.

9. The method of claim 1 wherein said second dielectric layer, said third dielectric layer, and said fourth dielectric layer are silicon dioxide formed using plasma enhanced deposition of tetraethyl orthosilicate.